blob: d037767ecc8f81408d2a5f96d45e1d04fa1d1154 [file] [log] [blame]
Tim Harveye56c5792015-05-08 18:28:35 -07001/*
2 * Copyright (C) 2013 Gateworks Corporation
3 *
4 * Author: Tim Harvey <tharvey@gateworks.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef _GWVENTANA_COMMON_H_
10#define _GWVENTANA_COMMON_H_
11
12#include "ventana_eeprom.h"
13
14/* GPIO's common to all baseboards */
15#define GP_PHY_RST IMX_GPIO_NR(1, 30)
16#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
17#define GP_SD3_CD IMX_GPIO_NR(7, 0)
18#define GP_RS232_EN IMX_GPIO_NR(2, 11)
19#define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
Tim Harvey34b080b2016-05-24 11:03:59 -070020#define GP_SD3_VSELECT IMX_GPIO_NR(6, 14)
Tim Harveye56c5792015-05-08 18:28:35 -070021
22#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
23 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
24 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
25
26#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
27 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
28 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
29
30#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
31 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
32 PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
33
34#define SPI_PAD_CTRL (PAD_CTL_HYS | \
35 PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
36 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
37
Tim Harveye56c5792015-05-08 18:28:35 -070038#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
39 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
40 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
41
42#define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
43 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
44 PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
45
Tim Harvey9a83a812015-05-26 11:04:54 -070046#define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION)
Tim Harveye56c5792015-05-08 18:28:35 -070047
48#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
49
50/*
51 * each baseboard has 4 user configurable Digital IO lines which can
52 * be pinmuxed as a GPIO or in some cases a PWM
53 */
54struct dio_cfg {
55 iomux_v3_cfg_t gpio_padmux[2];
56 unsigned gpio_param;
57 iomux_v3_cfg_t pwm_padmux[2];
58 unsigned pwm_param;
59};
60
61struct ventana {
62 /* pinmux */
63 iomux_v3_cfg_t const *gpio_pads;
64 int num_pads;
65 /* DIO pinmux/val */
66 struct dio_cfg dio_cfg[4];
67 int num_gpios;
68 /* various gpios (0 if non-existent) */
69 int leds[3];
70 int pcie_rst;
71 int mezz_pwren;
72 int mezz_irq;
73 int rs485en;
74 int gps_shdn;
75 int vidin_en;
76 int dioi2c_en;
77 int pcie_sson;
78 int usb_sel;
79 int wdis;
Tim Harvey5c555722016-05-24 11:03:56 -070080 int msata_en;
Tim Harvey34b080b2016-05-24 11:03:59 -070081 bool usd_vsel;
Tim Harveye56c5792015-05-08 18:28:35 -070082};
83
84extern struct ventana gpio_cfg[GW_UNKNOWN];
85
86/* configure i2c iomux */
87void setup_ventana_i2c(void);
88/* configure uart iomux */
89void setup_iomux_uart(void);
90/* conifgure PMIC */
Tim Harvey6d38f3a2015-05-08 18:28:37 -070091void setup_pmic(void);
Tim Harveye56c5792015-05-08 18:28:35 -070092/* configure gpio iomux/defaults */
93void setup_iomux_gpio(int board, struct ventana_board_info *);
94/* late setup of GPIO (configuration per baseboard and env) */
95void setup_board_gpio(int board, struct ventana_board_info *);
96
97#endif /* #ifndef _GWVENTANA_COMMON_H_ */