blob: 430dbef622b1bcc7f4640409a697a680cb4a9862 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chen-Yu Tsai795857d2016-05-02 10:28:15 +08002/*
3 * (C) Copyright 2016 Chen-Yu Tsai <wens@csie.org>
4 *
5 * X-Powers AXP809 Power Management IC driver
Chen-Yu Tsai795857d2016-05-02 10:28:15 +08006 */
7
8#define AXP809_CHIP_ID 0x03
9
10#define AXP809_OUTPUT_CTRL1 0x10
11#define AXP809_OUTPUT_CTRL1_DC5LDO_EN (1 << 0)
12#define AXP809_OUTPUT_CTRL1_DCDC1_EN (1 << 1)
13#define AXP809_OUTPUT_CTRL1_DCDC2_EN (1 << 2)
14#define AXP809_OUTPUT_CTRL1_DCDC3_EN (1 << 3)
15#define AXP809_OUTPUT_CTRL1_DCDC4_EN (1 << 4)
16#define AXP809_OUTPUT_CTRL1_DCDC5_EN (1 << 5)
17#define AXP809_OUTPUT_CTRL1_ALDO1_EN (1 << 6)
18#define AXP809_OUTPUT_CTRL1_ALDO2_EN (1 << 7)
19#define AXP809_OUTPUT_CTRL2 0x12
20#define AXP809_OUTPUT_CTRL2_ELDO1_EN (1 << 0)
21#define AXP809_OUTPUT_CTRL2_ELDO2_EN (1 << 1)
22#define AXP809_OUTPUT_CTRL2_ELDO3_EN (1 << 2)
23#define AXP809_OUTPUT_CTRL2_DLDO1_EN (1 << 3)
24#define AXP809_OUTPUT_CTRL2_DLDO2_EN (1 << 4)
25#define AXP809_OUTPUT_CTRL2_ALDO3_EN (1 << 5)
26#define AXP809_OUTPUT_CTRL2_SWOUT_EN (1 << 6)
27#define AXP809_OUTPUT_CTRL2_DC1SW_EN (1 << 7)
28
29#define AXP809_DLDO1_CTRL 0x15
30#define AXP809_DLDO2_CTRL 0x16
31#define AXP809_ELDO1_CTRL 0x19
32#define AXP809_ELDO2_CTRL 0x1a
33#define AXP809_ELDO3_CTRL 0x1b
34#define AXP809_DC5LDO_CTRL 0x1c
35#define AXP809_DCDC1_CTRL 0x21
36#define AXP809_DCDC2_CTRL 0x22
37#define AXP809_DCDC3_CTRL 0x23
38#define AXP809_DCDC4_CTRL 0x24
39#define AXP809_DCDC5_CTRL 0x25
40#define AXP809_ALDO1_CTRL 0x28
41#define AXP809_ALDO2_CTRL 0x29
42#define AXP809_ALDO3_CTRL 0x2a
43#define AXP809_SHUTDOWN 0x32
44#define AXP809_SHUTDOWN_POWEROFF (1 << 7)
45
46/* For axp_gpio.c */
Samuel Holland344df3c2021-08-22 18:18:04 -050047#ifdef CONFIG_AXP809_POWER
Chen-Yu Tsai795857d2016-05-02 10:28:15 +080048#define AXP_POWER_STATUS 0x00
49#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5)
50#define AXP_VBUS_IPSOUT 0x30
51#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2)
52#define AXP_MISC_CTRL 0x8f
53#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4)
54#define AXP_GPIO0_CTRL 0x90
55#define AXP_GPIO1_CTRL 0x92
56#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
57#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */
58#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */
59#define AXP_GPIO_STATE 0x94
60#define AXP_GPIO_STATE_OFFSET 0
Samuel Holland344df3c2021-08-22 18:18:04 -050061#endif