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Wolfgang Denk70a20472005-09-25 15:59:01 +02001#!/usr/bin/python
2
3# (C) Copyright 2004
4# BEC Systems <http://bec-systems.com>
5# Cliff Brake <cliff.brake@gmail.com>
6
Wolfgang Denk1a459662013-07-08 09:37:19 +02007# SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk70a20472005-09-25 15:59:01 +02008
9# calculations for PXA255 registers
10
11class gpio:
12 dir = '0'
13 set = '0'
14 clr = '0'
15 alt = '0'
16 desc = ''
17
18 def __init__(self, dir=0, set=0, clr=0, alt=0, desc=''):
19 self.dir = dir
20 self.set = set
21 self.clr = clr
22 self.alt = alt
23 self.desc = desc
Wolfgang Denk93e14592013-10-04 17:43:24 +020024
Wolfgang Denk70a20472005-09-25 15:59:01 +020025
26# the following is a dictionary of all GPIOs in the system
27# the key is the GPIO number
28
29
30pxa255_alt_func = {
31 0: ['gpio', 'none', 'none', 'none'],
32 1: ['gpio', 'gpio reset', 'none', 'none'],
33 2: ['gpio', 'none', 'none', 'none'],
34 3: ['gpio', 'none', 'none', 'none'],
35 4: ['gpio', 'none', 'none', 'none'],
36 5: ['gpio', 'none', 'none', 'none'],
37 6: ['gpio', 'MMC clk', 'none', 'none'],
38 7: ['gpio', '48MHz clock', 'none', 'none'],
39 8: ['gpio', 'MMC CS0', 'none', 'none'],
40 9: ['gpio', 'MMC CS1', 'none', 'none'],
41 10: ['gpio', 'RTC Clock', 'none', 'none'],
42 11: ['gpio', '3.6MHz', 'none', 'none'],
43 12: ['gpio', '32KHz', 'none', 'none'],
44 13: ['gpio', 'none', 'MBGNT', 'none'],
45 14: ['gpio', 'MBREQ', 'none', 'none'],
46 15: ['gpio', 'none', 'nCS_1', 'none'],
47 16: ['gpio', 'none', 'PWM0', 'none'],
48 17: ['gpio', 'none', 'PWM1', 'none'],
49 18: ['gpio', 'RDY', 'none', 'none'],
50 19: ['gpio', 'DREQ[1]', 'none', 'none'],
51 20: ['gpio', 'DREQ[0]', 'none', 'none'],
52 21: ['gpio', 'none', 'none', 'none'],
53 22: ['gpio', 'none', 'none', 'none'],
54 23: ['gpio', 'none', 'SSP SCLK', 'none'],
55 24: ['gpio', 'none', 'SSP SFRM', 'none'],
56 25: ['gpio', 'none', 'SSP TXD', 'none'],
57 26: ['gpio', 'SSP RXD', 'none', 'none'],
58 27: ['gpio', 'SSP EXTCLK', 'none', 'none'],
59 28: ['gpio', 'AC97 bitclk in, I2S bitclock out', 'I2S bitclock in', 'none'],
60 29: ['gpio', 'AC97 SDATA_IN0', 'I2S SDATA_IN', 'none'],
61 30: ['gpio', 'I2S SDATA_OUT', 'AC97 SDATA_OUT', 'none'],
62 31: ['gpio', 'I2S SYNC', 'AC97 SYNC', 'none'],
63 32: ['gpio', 'AC97 SDATA_IN1', 'I2S SYSCLK', 'none'],
64 33: ['gpio', 'none', 'nCS_5', 'none'],
65 34: ['gpio', 'FF RXD', 'MMC CS0', 'none'],
66 35: ['gpio', 'FF CTS', 'none', 'none'],
67 36: ['gpio', 'FF DCD', 'none', 'none'],
68 37: ['gpio', 'FF DSR', 'none', 'none'],
69 38: ['gpio', 'FF RI', 'none', 'none'],
70 39: ['gpio', 'MMC CS1', 'FF TXD', 'none'],
71 40: ['gpio', 'none', 'FF DTR', 'none'],
72 41: ['gpio', 'none', 'FF RTS', 'none'],
73 42: ['gpio', 'BT RXD', 'none', 'HW RXD'],
74 43: ['gpio', 'none', 'BT TXD', 'HW TXD'],
75 44: ['gpio', 'BT CTS', 'none', 'HW CTS'],
76 45: ['gpio', 'none', 'BT RTS', 'HW RTS'],
77 46: ['gpio', 'ICP_RXD', 'STD RXD', 'none'],
78 47: ['gpio', 'STD TXD', 'ICP_TXD', 'none'],
79 48: ['gpio', 'HW TXD', 'nPOE', 'none'],
80 49: ['gpio', 'HW RXD', 'nPWE', 'none'],
81 50: ['gpio', 'HW CTS', 'nPIOR', 'none'],
82 51: ['gpio', 'nPIOW', 'HW RTS', 'none'],
83 52: ['gpio', 'none', 'nPCE[1]', 'none'],
84 53: ['gpio', 'MMC CLK', 'nPCE[2]', 'none'],
85 54: ['gpio', 'MMC CLK', 'nPSKSEL', 'none'],
86 55: ['gpio', 'none', 'nPREG', 'none'],
87 56: ['gpio', 'nPWAIT', 'none', 'none'],
88 57: ['gpio', 'nIOIS16', 'none', 'none'],
89 58: ['gpio', 'none', 'LDD[0]', 'none'],
90 59: ['gpio', 'none', 'LDD[1]', 'none'],
91 60: ['gpio', 'none', 'LDD[2]', 'none'],
92 61: ['gpio', 'none', 'LDD[3]', 'none'],
93 62: ['gpio', 'none', 'LDD[4]', 'none'],
94 63: ['gpio', 'none', 'LDD[5]', 'none'],
95 64: ['gpio', 'none', 'LDD[6]', 'none'],
96 65: ['gpio', 'none', 'LDD[7]', 'none'],
97 66: ['gpio', 'MBREQ', 'LDD[8]', 'none'],
98 67: ['gpio', 'MMC CS0', 'LDD[9]', 'none'],
99 68: ['gpio', 'MMC CS1', 'LDD[10]', 'none'],
100 69: ['gpio', 'MMC CLK', 'LDD[11]', 'none'],
101 70: ['gpio', 'RTC CLK', 'LDD[12]', 'none'],
102 71: ['gpio', '3.6 MHz', 'LDD[13]', 'none'],
103 72: ['gpio', '32 KHz', 'LDD[14]', 'none'],
104 73: ['gpio', 'MBGNT', 'LDD[15]', 'none'],
105 74: ['gpio', 'none', 'LCD_FCLK', 'none'],
106 75: ['gpio', 'none', 'LCD_LCLK', 'none'],
107 76: ['gpio', 'none', 'LCD_PCLK', 'none'],
108 77: ['gpio', 'none', 'LCD_ACBIAS', 'none'],
109 78: ['gpio', 'none', 'nCS_2', 'none'],
110 79: ['gpio', 'none', 'nCS_3', 'none'],
111 80: ['gpio', 'none', 'nCS_4', 'none'],
112 81: ['gpio', 'NSSPSCLK', 'none', 'none'],
113 82: ['gpio', 'NSSPSFRM', 'none', 'none'],
114 83: ['gpio', 'NSSPTXD', 'NSSPRXD', 'none'],
115 84: ['gpio', 'NSSPTXD', 'NSSPRXD', 'none'],
116}
117
118
119#def __init__(self, dir=0, set=0, clr=0, alt=0, desc=''):
120
121gpio_list = []
122
123for i in range(0,85):
124 gpio_list.append(gpio())
125
126#chip select GPIOs
127gpio_list[18] = gpio(0, 0, 0, 1, 'RDY')
128gpio_list[33] = gpio(1, 1, 0, 2, 'CS5#')
129gpio_list[80] = gpio(1, 1, 0, 2, 'CS4#')
130gpio_list[79] = gpio(1, 1, 0, 2, 'CS3#')
131gpio_list[78] = gpio(1, 1, 0, 2, 'CS2#')
132gpio_list[15] = gpio(1, 1, 0, 2, 'CS1#')
133gpio_list[22] = gpio(0, 0, 0, 0, 'Consumer IR, PCC_S1_IRQ_O#')
134gpio_list[21] = gpio(0, 0, 0, 0, 'IRQ_IDE, PFI')
135gpio_list[19] = gpio(0, 0, 0, 0, 'XB_DREQ1, PCC_SO_IRQ_O#')
136gpio_list[20] = gpio(0, 0, 0, 0, 'XB_DREQ0')
137gpio_list[20] = gpio(0, 0, 0, 0, 'XB_DREQ0')
138gpio_list[17] = gpio(0, 0, 0, 0, 'IRQ_AXB')
139gpio_list[16] = gpio(1, 0, 0, 2, 'PWM0')
140
141# PCMCIA stuff
142gpio_list[57] = gpio(0, 0, 0, 1, 'PCC_IOIS16#')
143gpio_list[56] = gpio(0, 0, 0, 1, 'PCC_WAIT#')
144gpio_list[55] = gpio(1, 0, 0, 2, 'PCC_REG#')
145gpio_list[54] = gpio(1, 0, 0, 2, 'PCC_SCKSEL')
146gpio_list[53] = gpio(1, 1, 0, 2, 'PCC_CE2#')
147gpio_list[52] = gpio(1, 1, 0, 2, 'PCC_CE1#')
148gpio_list[51] = gpio(1, 1, 0, 1, 'PCC_IOW#')
149gpio_list[50] = gpio(1, 1, 0, 2, 'PCC_IOR#')
150gpio_list[49] = gpio(1, 1, 0, 2, 'PCC_WE#')
151gpio_list[48] = gpio(1, 1, 0, 2, 'PCC_OE#')
152
153# SSP port
154gpio_list[26] = gpio(0, 0, 0, 1, 'SSP_RXD')
155gpio_list[25] = gpio(0, 0, 0, 0, 'SSP_TXD')
156gpio_list[24] = gpio(1, 0, 1, 2, 'SSP_SFRM')
157gpio_list[23] = gpio(1, 0, 1, 2, 'SSP_SCLK')
158gpio_list[27] = gpio(0, 0, 0, 0, 'SSP_EXTCLK')
159
160# audio codec
161gpio_list[32] = gpio(0, 0, 0, 0, 'AUD_SDIN1')
162gpio_list[31] = gpio(1, 0, 0, 2, 'AC_SYNC')
163gpio_list[30] = gpio(1, 0, 0, 2, 'AC_SDOUT')
164gpio_list[29] = gpio(0, 0, 0, 1, 'AUD_SDIN0')
165gpio_list[28] = gpio(0, 0, 0, 1, 'AC_BITCLK')
166
167# serial ports
168gpio_list[39] = gpio(1, 0, 0, 2, 'FF_TXD')
169gpio_list[34] = gpio(0, 0, 0, 1, 'FF_RXD')
170gpio_list[41] = gpio(1, 0, 0, 2, 'FF_RTS')
171gpio_list[35] = gpio(0, 0, 0, 1, 'FF_CTS')
172gpio_list[40] = gpio(1, 0, 0, 2, 'FF_DTR')
173gpio_list[37] = gpio(0, 0, 0, 1, 'FF_DSR')
174gpio_list[38] = gpio(0, 0, 0, 1, 'FF_RI')
175gpio_list[36] = gpio(0, 0, 0, 1, 'FF_DCD')
176
177gpio_list[43] = gpio(1, 0, 0, 2, 'BT_TXD')
178gpio_list[42] = gpio(0, 0, 0, 1, 'BT_RXD')
179gpio_list[45] = gpio(1, 0, 0, 2, 'BT_RTS')
180gpio_list[44] = gpio(0, 0, 0, 1, 'BT_CTS')
181
182gpio_list[47] = gpio(1, 0, 0, 1, 'IR_TXD')
183gpio_list[46] = gpio(0, 0, 0, 2, 'IR_RXD')
184
185# misc GPIO signals
186gpio_list[14] = gpio(0, 0, 0, 0, 'MBREQ')
187gpio_list[13] = gpio(0, 0, 0, 0, 'MBGNT')
188gpio_list[12] = gpio(0, 0, 0, 0, 'GPIO_12/32K_CLK')
189gpio_list[11] = gpio(0, 0, 0, 0, '3M6_CLK')
190gpio_list[10] = gpio(1, 0, 1, 0, 'GPIO_10/RTC_CLK/debug LED')
191gpio_list[9] = gpio(0, 0, 0, 0, 'MMC_CD#')
192gpio_list[8] = gpio(0, 0, 0, 0, 'PCC_S1_CD#')
193gpio_list[7] = gpio(0, 0, 0, 0, 'PCC_S0_CD#')
194gpio_list[6] = gpio(1, 0, 0, 1, 'MMC_CLK')
195gpio_list[5] = gpio(0, 0, 0, 0, 'IRQ_TOUCH#')
196gpio_list[4] = gpio(0, 0, 0, 0, 'IRQ_ETH')
197gpio_list[3] = gpio(0, 0, 0, 0, 'MQ_IRQ#')
198gpio_list[2] = gpio(0, 0, 0, 0, 'BAT_DATA')
199gpio_list[1] = gpio(0, 0, 0, 1, 'USER_RESET#')
200gpio_list[0] = gpio(0, 0, 0, 1, 'USER_RESET#')
201
202# LCD GPIOs
203gpio_list[58] = gpio(1, 0, 0, 2, 'LDD0')
204gpio_list[59] = gpio(1, 0, 0, 2, 'LDD1')
205gpio_list[60] = gpio(1, 0, 0, 2, 'LDD2')
206gpio_list[61] = gpio(1, 0, 0, 2, 'LDD3')
207gpio_list[62] = gpio(1, 0, 0, 2, 'LDD4')
208gpio_list[63] = gpio(1, 0, 0, 2, 'LDD5')
209gpio_list[64] = gpio(1, 0, 0, 2, 'LDD6')
210gpio_list[65] = gpio(1, 0, 0, 2, 'LDD7')
211gpio_list[66] = gpio(1, 0, 0, 2, 'LDD8')
212gpio_list[67] = gpio(1, 0, 0, 2, 'LDD9')
213gpio_list[68] = gpio(1, 0, 0, 2, 'LDD10')
214gpio_list[69] = gpio(1, 0, 0, 2, 'LDD11')
215gpio_list[70] = gpio(1, 0, 0, 2, 'LDD12')
216gpio_list[71] = gpio(1, 0, 0, 2, 'LDD13')
217gpio_list[72] = gpio(1, 0, 0, 2, 'LDD14')
218gpio_list[73] = gpio(1, 0, 0, 2, 'LDD15')
219gpio_list[74] = gpio(1, 0, 0, 2, 'FCLK')
220gpio_list[75] = gpio(1, 0, 0, 2, 'LCLK')
221gpio_list[76] = gpio(1, 0, 0, 2, 'PCLK')
222gpio_list[77] = gpio(1, 0, 0, 2, 'ACBIAS')
223
224# calculate registers
225pxa_regs = {
226 'gpdr0':0, 'gpdr1':0, 'gpdr2':0,
227 'gpsr0':0, 'gpsr1':0, 'gpsr2':0,
228 'gpcr0':0, 'gpcr1':0, 'gpcr2':0,
229 'gafr0_l':0, 'gafr0_u':0,
230 'gafr1_l':0, 'gafr1_u':0,
231 'gafr2_l':0, 'gafr2_u':0,
232}
233
234# U-boot define names
235uboot_reg_names = {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236 'gpdr0':'CONFIG_SYS_GPDR0_VAL', 'gpdr1':'CONFIG_SYS_GPDR1_VAL', 'gpdr2':'CONFIG_SYS_GPDR2_VAL',
237 'gpsr0':'CONFIG_SYS_GPSR0_VAL', 'gpsr1':'CONFIG_SYS_GPSR1_VAL', 'gpsr2':'CONFIG_SYS_GPSR2_VAL',
238 'gpcr0':'CONFIG_SYS_GPCR0_VAL', 'gpcr1':'CONFIG_SYS_GPCR1_VAL', 'gpcr2':'CONFIG_SYS_GPCR2_VAL',
239 'gafr0_l':'CONFIG_SYS_GAFR0_L_VAL', 'gafr0_u':'CONFIG_SYS_GAFR0_U_VAL',
240 'gafr1_l':'CONFIG_SYS_GAFR1_L_VAL', 'gafr1_u':'CONFIG_SYS_GAFR1_U_VAL',
241 'gafr2_l':'CONFIG_SYS_GAFR2_L_VAL', 'gafr2_u':'CONFIG_SYS_GAFR2_U_VAL',
Wolfgang Denk70a20472005-09-25 15:59:01 +0200242}
243
244# bit mappings
245
246bit_mappings = [
247
248{ 'gpio':(0,32), 'shift':1, 'regs':{'dir':'gpdr0', 'set':'gpsr0', 'clr':'gpcr0'} },
249{ 'gpio':(32,64), 'shift':1, 'regs':{'dir':'gpdr1', 'set':'gpsr1', 'clr':'gpcr1'} },
250{ 'gpio':(64,85), 'shift':1, 'regs':{'dir':'gpdr2', 'set':'gpsr2', 'clr':'gpcr2'} },
251{ 'gpio':(0,16), 'shift':2, 'regs':{'alt':'gafr0_l'} },
252{ 'gpio':(16,32), 'shift':2, 'regs':{'alt':'gafr0_u'} },
253{ 'gpio':(32,48), 'shift':2, 'regs':{'alt':'gafr1_l'} },
254{ 'gpio':(48,64), 'shift':2, 'regs':{'alt':'gafr1_u'} },
255{ 'gpio':(64,80), 'shift':2, 'regs':{'alt':'gafr2_l'} },
256{ 'gpio':(80,85), 'shift':2, 'regs':{'alt':'gafr2_u'} },
257
258]
259
260def stuff_bits(bit_mapping, gpio_list):
261 gpios = range( bit_mapping['gpio'][0], bit_mapping['gpio'][1])
262
263 for gpio in gpios:
264 for reg in bit_mapping['regs'].keys():
265 value = eval( 'gpio_list[gpio].%s' % (reg) )
266 if ( value ):
267 # we have a high bit
268 bit_shift = (gpio - bit_mapping['gpio'][0]) * bit_mapping['shift']
269 bit = value << (bit_shift)
270 pxa_regs[bit_mapping['regs'][reg]] |= bit
271
272for i in bit_mappings:
273 stuff_bits(i, gpio_list)
274
275# now print out all regs
276registers = pxa_regs.keys()
277registers.sort()
278for reg in registers:
279 print '%s: 0x%x' % (reg, pxa_regs[reg])
280
281# print define to past right into U-Boot source code
282
Wolfgang Denk93e14592013-10-04 17:43:24 +0200283print
284print
Wolfgang Denk70a20472005-09-25 15:59:01 +0200285
286for reg in registers:
287 print '#define %s 0x%x' % (uboot_reg_names[reg], pxa_regs[reg])
288
289# print all GPIOS
290print
291print
292
293for i in range(len(gpio_list)):
294 gpio_i = gpio_list[i]
295 alt_func_desc = pxa255_alt_func[i][gpio_i.alt]
296 print 'GPIO: %i, dir=%i, set=%i, clr=%i, alt=%s, desc=%s' % (i, gpio_i.dir, gpio_i.set, gpio_i.clr, alt_func_desc, gpio_i.desc)
297
298