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Aneesh V16dc7022011-09-08 11:05:49 -04001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
7 * TI OMAP4 common configuration settings
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_OMAP4_COMMON_H
29#define __CONFIG_OMAP4_COMMON_H
30
31/*
32 * High Level Configuration Options
33 */
34#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP44XX 1 /* which is a 44XX */
37#define CONFIG_OMAP4430 1 /* which is in a 4430 */
Marek Vasut308252a2012-07-21 05:02:23 +000038#define CONFIG_OMAP_GPIO
Aneesh V16dc7022011-09-08 11:05:49 -040039
40/* Get CPU defs */
41#include <asm/arch/cpu.h>
Sricharan508a58f2011-11-15 09:49:55 -050042#include <asm/arch/omap.h>
Aneesh V16dc7022011-09-08 11:05:49 -040043
44/* Display CPU and Board Info */
45#define CONFIG_DISPLAY_CPUINFO 1
46#define CONFIG_DISPLAY_BOARDINFO 1
47
48/* Clock Defines */
49#define V_OSCK 38400000 /* Clock output from T2 */
50#define V_SCLK V_OSCK
51
Aneesh V16dc7022011-09-08 11:05:49 -040052#define CONFIG_MISC_INIT_R
53
54#define CONFIG_OF_LIBFDT 1
55
56#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57#define CONFIG_SETUP_MEMORY_TAGS 1
58#define CONFIG_INITRD_TAG 1
59#define CONFIG_REVISION_TAG 1
60
61/*
62 * Size of malloc() pool
63 * Total Size Environment - 128k
64 * Malloc - add 256k
65 */
66#define CONFIG_ENV_SIZE (128 << 10)
67#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
68/* Vector Base */
69#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
70
71/*
72 * Hardware drivers
73 */
74
75/*
76 * serial port - NS16550 compatible
77 */
78#define V_NS16550_CLK 48000000
79
80#define CONFIG_SYS_NS16550
81#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE (-4)
83#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84#define CONFIG_CONS_INDEX 3
85#define CONFIG_SYS_NS16550_COM3 UART3_BASE
86
87#define CONFIG_BAUDRATE 115200
88#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
89 115200}
90/* I2C */
91#define CONFIG_HARD_I2C 1
92#define CONFIG_SYS_I2C_SPEED 100000
93#define CONFIG_SYS_I2C_SLAVE 1
Aneesh V16dc7022011-09-08 11:05:49 -040094#define CONFIG_DRIVER_OMAP34XX_I2C 1
95#define CONFIG_I2C_MULTI_BUS 1
96
97/* TWL6030 */
Balaji T K14fa2dd2011-09-08 06:34:57 +000098#ifndef CONFIG_SPL_BUILD
Aneesh V16dc7022011-09-08 11:05:49 -040099#define CONFIG_TWL6030_POWER 1
Balaji T K14fa2dd2011-09-08 06:34:57 +0000100#endif
Aneesh V16dc7022011-09-08 11:05:49 -0400101
102/* MMC */
103#define CONFIG_GENERIC_MMC 1
104#define CONFIG_MMC 1
105#define CONFIG_OMAP_HSMMC 1
Aneesh V16dc7022011-09-08 11:05:49 -0400106#define CONFIG_DOS_PARTITION 1
107
108
109/* USB */
110#define CONFIG_MUSB_UDC 1
111#define CONFIG_USB_OMAP3 1
112
113/* USB device configuration */
114#define CONFIG_USB_DEVICE 1
115#define CONFIG_USB_TTY 1
116#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
117
118/* Flash */
119#define CONFIG_SYS_NO_FLASH 1
120
121/* commands to include */
122#include <config_cmd_default.h>
123
124/* Enabled commands */
125#define CONFIG_CMD_EXT2 /* EXT2 Support */
126#define CONFIG_CMD_FAT /* FAT support */
127#define CONFIG_CMD_I2C /* I2C serial bus support */
128#define CONFIG_CMD_MMC /* MMC support */
129
130/* Disabled commands */
131#undef CONFIG_CMD_NET
132#undef CONFIG_CMD_NFS
133#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
134#undef CONFIG_CMD_IMLS /* List all found images */
135
136/*
137 * Environment setup
138 */
139
140#define CONFIG_BOOTDELAY 3
141
142#define CONFIG_ENV_OVERWRITE
143
144#define CONFIG_EXTRA_ENV_SETTINGS \
145 "loadaddr=0x82000000\0" \
Aneesh Vd71a4912011-11-21 23:38:58 +0000146 "console=ttyO2,115200n8\0" \
Jon Hunterc176dd02012-05-01 10:05:08 +0000147 "fdt_high=0xffffffff\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400148 "usbtty=cdc_acm\0" \
149 "vram=16M\0" \
150 "mmcdev=0\0" \
151 "mmcroot=/dev/mmcblk0p2 rw\0" \
152 "mmcrootfstype=ext3 rootwait\0" \
153 "mmcargs=setenv bootargs console=${console} " \
154 "vram=${vram} " \
155 "root=${mmcroot} " \
156 "rootfstype=${mmcrootfstype}\0" \
157 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
158 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
159 "source ${loadaddr}\0" \
160 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
161 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
162 "run mmcargs; " \
163 "bootm ${loadaddr}\0" \
164
165#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000166 "mmc dev ${mmcdev}; if mmc rescan; then " \
Aneesh V16dc7022011-09-08 11:05:49 -0400167 "if run loadbootscript; then " \
168 "run bootscript; " \
169 "else " \
170 "if run loaduimage; then " \
171 "run mmcboot; " \
172 "fi; " \
173 "fi; " \
174 "fi"
175
176#define CONFIG_AUTO_COMPLETE 1
177
178/*
179 * Miscellaneous configurable options
180 */
181
182#define CONFIG_SYS_LONGHELP /* undef to save memory */
183#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Aneesh V16dc7022011-09-08 11:05:49 -0400184#define CONFIG_SYS_CBSIZE 512
185/* Print Buffer Size */
186#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
187 sizeof(CONFIG_SYS_PROMPT) + 16)
188#define CONFIG_SYS_MAXARGS 16
189/* Boot Argument Buffer Size */
190#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
191
192/*
193 * memtest setup
194 */
195#define CONFIG_SYS_MEMTEST_START 0x80000000
196#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
197
198/* Default load address */
199#define CONFIG_SYS_LOAD_ADDR 0x80000000
200
201/* Use General purpose timer 1 */
202#define CONFIG_SYS_TIMERBASE GPT2_BASE
203#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
204#define CONFIG_SYS_HZ 1000
205
206/*
Aneesh V16dc7022011-09-08 11:05:49 -0400207 * SDRAM Memory Map
208 * Even though we use two CS all the memory
209 * is mapped to one contiguous block
210 */
211#define CONFIG_NR_DRAM_BANKS 1
212
213#define CONFIG_SYS_SDRAM_BASE 0x80000000
Tom Rini41aebf82012-08-08 17:03:10 -0700214#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Aneesh V16dc7022011-09-08 11:05:49 -0400215 GENERATED_GBL_DATA_SIZE)
216
217#ifndef CONFIG_SYS_L2CACHE_OFF
218#define CONFIG_SYS_L2_PL310 1
219#define CONFIG_SYS_PL310_BASE 0x48242000
220#endif
Aneesh V8e408522011-11-21 23:38:59 +0000221#define CONFIG_SYS_CACHELINE_SIZE 32
Aneesh V16dc7022011-09-08 11:05:49 -0400222
223/* Defines for SDRAM init */
SRICHARAN R8e706912011-09-27 01:43:18 +0000224#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
225
Aneesh V16dc7022011-09-08 11:05:49 -0400226#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
227#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
228#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
229#endif
230
231/* Defines for SPL */
232#define CONFIG_SPL
Tom Rini47f7bca2012-08-13 12:03:19 -0700233#define CONFIG_SPL_FRAMEWORK
Aneesh V16dc7022011-09-08 11:05:49 -0400234#define CONFIG_SPL_TEXT_BASE 0x40304350
235#define CONFIG_SPL_MAX_SIZE (38 * 1024)
Tom Rini41aebf82012-08-08 17:03:10 -0700236#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Tom Rini861a86f2012-08-13 11:37:56 -0700237#define CONFIG_SPL_DISPLAY_PRINT
Aneesh V16dc7022011-09-08 11:05:49 -0400238
Aneesh V2d01dd92011-10-21 12:29:34 -0400239/*
Aneesh V2d01dd92011-10-21 12:29:34 -0400240 * 64 bytes before this address should be set aside for u-boot.img's
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000241 * header. That is 80E7FFC0--0x80E80000 should not be used for any
Aneesh V2d01dd92011-10-21 12:29:34 -0400242 * other needs.
243 */
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000244#define CONFIG_SYS_TEXT_BASE 0x80E80000
Aneesh V2d01dd92011-10-21 12:29:34 -0400245
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000246/*
247 * BSS and malloc area 64MB into memory to allow enough
248 * space for the kernel at the beginning of memory
249 */
250#define CONFIG_SPL_BSS_START_ADDR 0x84000000
251#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
252#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
253#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Aneesh V16dc7022011-09-08 11:05:49 -0400254
255#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
256#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
257#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
258#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
259
260#define CONFIG_SPL_LIBCOMMON_SUPPORT
261#define CONFIG_SPL_LIBDISK_SUPPORT
262#define CONFIG_SPL_I2C_SUPPORT
263#define CONFIG_SPL_MMC_SUPPORT
264#define CONFIG_SPL_FAT_SUPPORT
265#define CONFIG_SPL_LIBGENERIC_SUPPORT
266#define CONFIG_SPL_SERIAL_SUPPORT
Marek Vasut16e41c82012-07-21 05:02:27 +0000267#define CONFIG_SPL_GPIO_SUPPORT
Thomas Weberd1df0fd2012-05-14 10:28:54 +0000268#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
Aneesh V16dc7022011-09-08 11:05:49 -0400269
Aneesh V20c63122012-03-08 07:20:22 +0000270#define CONFIG_SYS_THUMB_BUILD
271
Aneesh V16dc7022011-09-08 11:05:49 -0400272#endif /* __CONFIG_OMAP4_COMMON_H */