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Timur Tabib55d98c2008-02-08 13:15:54 -06001/*
2 * Vitesse 7385 Switch Firmware Upload
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
6 * Copyright 2008 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
10 *
11 * This module uploads proprietary firmware for the Vitesse VSC7385 5-port
12 * switch.
13 */
14
15#include <config.h>
Timur Tabib55d98c2008-02-08 13:15:54 -060016#include <common.h>
17#include <asm/io.h>
18#include <asm/errno.h>
Kim Phillips960d70c2012-10-29 13:34:34 +000019#include "vsc7385.h"
Timur Tabib55d98c2008-02-08 13:15:54 -060020
21/*
22 * Upload a Vitesse VSC7385 firmware image to the hardware
23 *
24 * This function takes a pointer to a VSC7385 firmware image and a size, and
25 * uploads that firmware to the VSC7385.
26 *
27 * This firmware is typically located at a board-specific flash address,
28 * and the size is typically 8KB.
29 *
30 * The firmware is Vitesse proprietary.
31 *
32 * Further details on the register information can be obtained from Vitesse.
33 */
34int vsc7385_upload_firmware(void *firmware, unsigned int size)
35{
36 u8 *fw = firmware;
37 unsigned int i;
38
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039 u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050);
40 u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040);
41 u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044);
42 u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048);
43 u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070);
Timur Tabib55d98c2008-02-08 13:15:54 -060044#ifdef DEBUG
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045 u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060);
Timur Tabib55d98c2008-02-08 13:15:54 -060046#endif
47
48 out_be32(gloreset, 3);
49 udelay(200);
50
51 out_be32(icpu_ctrl, 0x8E);
52 udelay(20);
53
54 out_be32(icpu_rom_map, 1);
55 udelay(20);
56
Wolfgang Denk438a4c12008-03-26 11:48:46 +010057 /* Write the firmware to I-RAM */
Timur Tabib55d98c2008-02-08 13:15:54 -060058 out_be32(icpu_addr, 0);
59 udelay(20);
60
61 for (i = 0; i < size; i++) {
62 out_be32(icpu_data, fw[i]);
63 udelay(20);
64 if (ctrlc())
65 return -EINTR;
66 }
67
68 /* Read back and compare */
69 out_be32(icpu_addr, 0);
70 udelay(20);
71
72 for (i = 0; i < size; i++) {
73 u8 value;
74
75 value = (u8) in_be32(icpu_data);
76 udelay(20);
77 if (value != fw[i]) {
78 debug("VSC7385: Upload mismatch: address 0x%x, "
Wolfgang Denk438a4c12008-03-26 11:48:46 +010079 "read value 0x%x, image value 0x%x\n",
80 i, value, fw[i]);
Timur Tabib55d98c2008-02-08 13:15:54 -060081
82 return -EIO;
83 }
84 if (ctrlc())
85 break;
86 }
87
88 out_be32(icpu_ctrl, 0x0B);
89 udelay(20);
90
91#ifdef DEBUG
92 printf("VSC7385: Chip ID is %08x\n", in_be32(chipid));
93 udelay(20);
94#endif
95
96 return 0;
97}