blob: a0acbbc01a4fa4c7519cb00dfda929f6127add8e [file] [log] [blame]
Alexey Brodkin2f16ac92014-02-04 12:56:14 +04001/*
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <asm/arcregs.h>
8
9#define NH_MODE (1 << 1) /* Disable timer if CPU is halted */
10
11int timer_init(void)
12{
13 write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
14 /* Set max value for counter/timer */
15 write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
16 /* Set initial count value and restart counter/timer */
17 write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
18 return 0;
19}
20
21unsigned long timer_read_counter(void)
22{
23 return read_aux_reg(ARC_AUX_TIMER0_CNT);
24}