blob: 57ac1eb24232c587a659ad4e2f246ae3726eccaf [file] [log] [blame]
Bo Shenc5e88852013-11-15 11:12:38 +08001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 * Aneesh V <aneesh@ti.com>
8 *
9 * (C) 2013 Atmel Corporation
10 * Bo Shen <voice.shen@atmel.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
16 LENGTH = CONFIG_SPL_MAX_SIZE }
17MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
18 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
19
20OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
21OUTPUT_ARCH(arm)
22ENTRY(_start)
23SECTIONS
24{
25 .text :
26 {
27 __start = .;
28 arch/arm/cpu/armv7/start.o (.text*)
29 *(.text*)
30 } >.sram
31
32 . = ALIGN(4);
33 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
34
35 . = ALIGN(4);
36 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
37
38 . = ALIGN(4);
39 __image_copy_end = .;
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +010040
41 .end :
42 {
43 *(.__end)
44 } >.sram
Bo Shenc5e88852013-11-15 11:12:38 +080045
46 .bss :
47 {
48 . = ALIGN(4);
49 __bss_start = .;
50 *(.bss*)
51 . = ALIGN(4);
52 __bss_end = .;
53 } >.sdram
54}