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wdenk8ed96042005-01-09 23:16:25 +00001/*
2 * armboot - Startup Code for OMP2420/ARM1136 CPU-core
3 *
wdenk082acfd2005-01-10 00:01:04 +00004 * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
wdenk8ed96042005-01-09 23:16:25 +00005 *
6 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
7 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
Detlev Zundel792a09e2009-05-13 10:54:10 +02008 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
wdenk8ed96042005-01-09 23:16:25 +00009 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
10 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk082acfd2005-01-10 00:01:04 +000022 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk8ed96042005-01-09 23:16:25 +000023 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020031#include <asm-offsets.h>
wdenk8ed96042005-01-09 23:16:25 +000032#include <config.h>
33#include <version.h>
wdenk8ed96042005-01-09 23:16:25 +000034.globl _start
wdenk082acfd2005-01-10 00:01:04 +000035_start: b reset
Magnus Liljadf812382009-06-13 20:50:00 +020036#ifdef CONFIG_PRELOADER
Kyungmin Park751b9b52008-01-17 16:43:25 +090037 ldr pc, _hang
38 ldr pc, _hang
39 ldr pc, _hang
40 ldr pc, _hang
41 ldr pc, _hang
42 ldr pc, _hang
43 ldr pc, _hang
44
45_hang:
46 .word do_hang
47 .word 0x12345678
48 .word 0x12345678
49 .word 0x12345678
50 .word 0x12345678
51 .word 0x12345678
52 .word 0x12345678
53 .word 0x12345678 /* now 16*4=64 */
54#else
wdenk8ed96042005-01-09 23:16:25 +000055 ldr pc, _undefined_instruction
56 ldr pc, _software_interrupt
57 ldr pc, _prefetch_abort
58 ldr pc, _data_abort
59 ldr pc, _not_used
60 ldr pc, _irq
61 ldr pc, _fiq
62
wdenk082acfd2005-01-10 00:01:04 +000063_undefined_instruction: .word undefined_instruction
wdenk8ed96042005-01-09 23:16:25 +000064_software_interrupt: .word software_interrupt
65_prefetch_abort: .word prefetch_abort
66_data_abort: .word data_abort
67_not_used: .word not_used
68_irq: .word irq
69_fiq: .word fiq
wdenk082acfd2005-01-10 00:01:04 +000070_pad: .word 0x12345678 /* now 16*4=64 */
Magnus Liljadf812382009-06-13 20:50:00 +020071#endif /* CONFIG_PRELOADER */
wdenk8ed96042005-01-09 23:16:25 +000072.global _end_vect
73_end_vect:
74
75 .balignl 16,0xdeadbeef
76/*
77 *************************************************************************
78 *
79 * Startup Code (reset vector)
80 *
81 * do important init only if we don't start from memory!
82 * setup Memory and board specific bits prior to relocation.
83 * relocate armboot to ram
84 * setup stack
85 *
86 *************************************************************************
87 */
88
Heiko Schochere48b7c02010-09-17 13:10:40 +020089.globl _TEXT_BASE
wdenk8ed96042005-01-09 23:16:25 +000090_TEXT_BASE:
Wolfgang Denk14d0a022010-10-07 21:51:12 +020091 .word CONFIG_SYS_TEXT_BASE
wdenk8ed96042005-01-09 23:16:25 +000092
wdenk8ed96042005-01-09 23:16:25 +000093/*
94 * These are defined in the board-specific linker script.
Heiko Schocherbafe7432010-10-13 07:57:14 +020095 * Subtracting _start from them lets the linker put their
96 * relative position in the executable instead of leaving
97 * them null.
wdenk8ed96042005-01-09 23:16:25 +000098 */
Heiko Schocherbafe7432010-10-13 07:57:14 +020099.globl _bss_start_ofs
100_bss_start_ofs:
101 .word __bss_start - _start
wdenk8ed96042005-01-09 23:16:25 +0000102
Heiko Schocherbafe7432010-10-13 07:57:14 +0200103.globl _bss_end_ofs
104_bss_end_ofs:
105 .word _end - _start
wdenk8ed96042005-01-09 23:16:25 +0000106
Heiko Schocherbafe7432010-10-13 07:57:14 +0200107.globl _datarel_start_ofs
108_datarel_start_ofs:
109 .word __datarel_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200110
Heiko Schocherbafe7432010-10-13 07:57:14 +0200111.globl _datarelrolocal_start_ofs
112_datarelrolocal_start_ofs:
113 .word __datarelrolocal_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200114
Heiko Schocherbafe7432010-10-13 07:57:14 +0200115.globl _datarellocal_start_ofs
116_datarellocal_start_ofs:
117 .word __datarellocal_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200118
Heiko Schocherbafe7432010-10-13 07:57:14 +0200119.globl _datarelro_start_ofs
120_datarelro_start_ofs:
121 .word __datarelro_start - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200122
wdenk8ed96042005-01-09 23:16:25 +0000123#ifdef CONFIG_USE_IRQ
124/* IRQ stack memory (calculated at run-time) */
125.globl IRQ_STACK_START
126IRQ_STACK_START:
127 .word 0x0badc0de
128
129/* IRQ stack memory (calculated at run-time) */
130.globl FIQ_STACK_START
131FIQ_STACK_START:
132 .word 0x0badc0de
133#endif
134
Heiko Schochere48b7c02010-09-17 13:10:40 +0200135#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
136/* IRQ stack memory (calculated at run-time) + 8 bytes */
137.globl IRQ_STACK_START_IN
138IRQ_STACK_START_IN:
139 .word 0x0badc0de
140#endif
141
142#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
143/*
144 * the actual reset code
145 */
146
147reset:
148 /*
149 * set the cpu to SVC32 mode
150 */
151 mrs r0,cpsr
152 bic r0,r0,#0x1f
153 orr r0,r0,#0xd3
154 msr cpsr,r0
155
156#ifdef CONFIG_OMAP2420H4
157 /* Copy vectors to mask ROM indirect addr */
158 adr r0, _start /* r0 <- current position of code */
159 add r0, r0, #4 /* skip reset vector */
160 mov r2, #64 /* r2 <- size to copy */
161 add r2, r0, r2 /* r2 <- source end address */
162 mov r1, #SRAM_OFFSET0 /* build vect addr */
163 mov r3, #SRAM_OFFSET1
164 add r1, r1, r3
165 mov r3, #SRAM_OFFSET2
166 add r1, r1, r3
167next:
168 ldmia r0!, {r3-r10} /* copy from source address [r0] */
169 stmia r1!, {r3-r10} /* copy to target address [r1] */
170 cmp r0, r2 /* until source end address [r2] */
171 bne next /* loop until equal */
172 bl cpy_clk_code /* put dpll adjust code behind vectors */
173#endif
174 /* the mask ROM code should have PLL and others stable */
175#ifndef CONFIG_SKIP_LOWLEVEL_INIT
176 bl cpu_init_crit
177#endif
178
179/* Set stackpointer in internal RAM to call board_init_f */
180call_board_init_f:
181 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
182 ldr r0,=0x00000000
183
184#ifdef CONFIG_NAND_SPL
185 bl nand_boot
186#else
187#ifdef CONFIG_ONENAND_IPL
188 bl start_oneboot
189#else
190 bl board_init_f
191#endif /* CONFIG_ONENAND_IPL */
192#endif /* CONFIG_NAND_SPL */
193
194/*------------------------------------------------------------------------------*/
195
196/*
197 * void relocate_code (addr_sp, gd, addr_moni)
198 *
199 * This "function" does not return, instead it continues in RAM
200 * after relocating the monitor code.
201 *
202 */
203 .globl relocate_code
204relocate_code:
205 mov r4, r0 /* save addr_sp */
206 mov r5, r1 /* save addr of gd */
207 mov r6, r2 /* save addr of destination */
208 mov r7, r2 /* save addr of destination */
209
210 /* Set up the stack */
211stack_setup:
212 mov sp, r4
213
214 adr r0, _start
215 ldr r2, _TEXT_BASE
Heiko Schocherbafe7432010-10-13 07:57:14 +0200216 ldr r3, _bss_start_ofs
217 add r2, r0, r3 /* r2 <- source end address */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200218 cmp r0, r6
219 beq clear_bss
220
221#ifndef CONFIG_SKIP_RELOCATE_UBOOT
222copy_loop:
223 ldmia r0!, {r9-r10} /* copy from source address [r0] */
224 stmia r6!, {r9-r10} /* copy to target address [r1] */
Albert Aribaudda90d4c2010-10-05 16:06:39 +0200225 cmp r0, r2 /* until source end address [r2] */
226 blo copy_loop
Heiko Schochere48b7c02010-09-17 13:10:40 +0200227
228#ifndef CONFIG_PRELOADER
Heiko Schocherbafe7432010-10-13 07:57:14 +0200229 /*
230 * fix .rel.dyn relocations
231 */
232 ldr r0, _TEXT_BASE /* r0 <- Text base */
233 sub r9, r7, r0 /* r9 <- relocation offset */
234 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
235 add r10, r10, r0 /* r10 <- sym table in FLASH */
236 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
237 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
238 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
239 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200240fixloop:
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100241 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
242 add r0, r0, r9 /* r0 <- location to fix up in RAM */
Heiko Schocherbafe7432010-10-13 07:57:14 +0200243 ldr r1, [r2, #4]
244 and r8, r1, #0xff
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100245 cmp r8, #23 /* relative fixup? */
Heiko Schocherbafe7432010-10-13 07:57:14 +0200246 beq fixrel
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100247 cmp r8, #2 /* absolute fixup? */
Heiko Schocherbafe7432010-10-13 07:57:14 +0200248 beq fixabs
249 /* ignore unknown type of fixup */
250 b fixnext
251fixabs:
252 /* absolute fix: set location to (offset) symbol value */
253 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
254 add r1, r10, r1 /* r1 <- address of symbol in table */
255 ldr r1, [r1, #4] /* r1 <- symbol value */
256 add r1, r9 /* r1 <- relocated sym addr */
257 b fixnext
258fixrel:
259 /* relative fix: increase location by offset */
260 ldr r1, [r0]
261 add r1, r1, r9
262fixnext:
263 str r1, [r0]
Gray Remlin8c0c2b92010-10-24 16:18:31 +0100264 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200265 cmp r2, r3
Wolfgang Denk79e63132010-10-23 23:22:38 +0200266 blo fixloop
Heiko Schochere48b7c02010-09-17 13:10:40 +0200267#endif
268#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
269
270clear_bss:
271#ifndef CONFIG_PRELOADER
Heiko Schocherbafe7432010-10-13 07:57:14 +0200272 ldr r0, _bss_start_ofs
273 ldr r1, _bss_end_ofs
Heiko Schochere48b7c02010-09-17 13:10:40 +0200274 ldr r3, _TEXT_BASE /* Text base */
275 mov r4, r7 /* reloc addr */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200276 add r0, r0, r4
Heiko Schochere48b7c02010-09-17 13:10:40 +0200277 add r1, r1, r4
278 mov r2, #0x00000000 /* clear */
279
280clbss_l:str r2, [r0] /* clear loop... */
281 add r0, r0, #4
282 cmp r0, r1
283 bne clbss_l
284#endif /* #ifndef CONFIG_PRELOADER */
285
286/*
287 * We are done. Do not return, instead branch to second part of board
288 * initialization, now running from RAM.
289 */
290#ifdef CONFIG_NAND_SPL
Heiko Schocherbafe7432010-10-13 07:57:14 +0200291 ldr r0, _nand_boot_ofs
292 adr r1, _start
293 add pc, r0, r1
294_nand_boot_ofs
295 : .word nand_boot - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200296#else
297jump_2_ram:
Heiko Schocherbafe7432010-10-13 07:57:14 +0200298 ldr r0, _board_init_r_ofs
299 adr r1, _start
Darius Augulis123fb7d2010-10-25 13:45:35 +0300300 add lr, r0, r1
301#ifndef CONFIG_SKIP_RELOCATE_UBOOT
302 add lr, lr, r9
303#endif
Heiko Schochere48b7c02010-09-17 13:10:40 +0200304 /* setup parameters for board_init_r */
305 mov r0, r5 /* gd_t */
306 mov r1, r7 /* dest_addr */
307 /* jump to it ... */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200308 mov pc, lr
309
Heiko Schocherbafe7432010-10-13 07:57:14 +0200310_board_init_r_ofs:
311 .word board_init_r - _start
Heiko Schochere48b7c02010-09-17 13:10:40 +0200312#endif
Heiko Schocherbafe7432010-10-13 07:57:14 +0200313
314_rel_dyn_start_ofs:
315 .word __rel_dyn_start - _start
316_rel_dyn_end_ofs:
317 .word __rel_dyn_end - _start
318_dynsym_start_ofs:
319 .word __dynsym_start - _start
320
Heiko Schochere48b7c02010-09-17 13:10:40 +0200321#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
wdenk8ed96042005-01-09 23:16:25 +0000322/*
323 * the actual reset code
324 */
325
326reset:
327 /*
328 * set the cpu to SVC32 mode
329 */
330 mrs r0,cpsr
331 bic r0,r0,#0x1f
332 orr r0,r0,#0xd3
333 msr cpsr,r0
334
335#ifdef CONFIG_OMAP2420H4
wdenk082acfd2005-01-10 00:01:04 +0000336 /* Copy vectors to mask ROM indirect addr */
337 adr r0, _start /* r0 <- current position of code */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200338 add r0, r0, #4 /* skip reset vector */
wdenk082acfd2005-01-10 00:01:04 +0000339 mov r2, #64 /* r2 <- size to copy */
340 add r2, r0, r2 /* r2 <- source end address */
341 mov r1, #SRAM_OFFSET0 /* build vect addr */
342 mov r3, #SRAM_OFFSET1
343 add r1, r1, r3
344 mov r3, #SRAM_OFFSET2
345 add r1, r1, r3
wdenk8ed96042005-01-09 23:16:25 +0000346next:
wdenk082acfd2005-01-10 00:01:04 +0000347 ldmia r0!, {r3-r10} /* copy from source address [r0] */
348 stmia r1!, {r3-r10} /* copy to target address [r1] */
349 cmp r0, r2 /* until source end address [r2] */
350 bne next /* loop until equal */
wdenk082acfd2005-01-10 00:01:04 +0000351 bl cpy_clk_code /* put dpll adjust code behind vectors */
wdenk8ed96042005-01-09 23:16:25 +0000352#endif
wdenk8ed96042005-01-09 23:16:25 +0000353 /* the mask ROM code should have PLL and others stable */
wdenk8aa1a2d2005-04-04 12:44:11 +0000354#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenk8ed96042005-01-09 23:16:25 +0000355 bl cpu_init_crit
wdenk8aa1a2d2005-04-04 12:44:11 +0000356#endif
wdenk8ed96042005-01-09 23:16:25 +0000357
wdenk8aa1a2d2005-04-04 12:44:11 +0000358#ifndef CONFIG_SKIP_RELOCATE_UBOOT
wdenk8ed96042005-01-09 23:16:25 +0000359relocate: /* relocate U-Boot to RAM */
360 adr r0, _start /* r0 <- current position of code */
361 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
wdenk082acfd2005-01-10 00:01:04 +0000362 cmp r0, r1 /* don't reloc during debug */
Magnus Liljadf812382009-06-13 20:50:00 +0200363#ifndef CONFIG_PRELOADER
wdenk082acfd2005-01-10 00:01:04 +0000364 beq stack_setup
Magnus Liljadf812382009-06-13 20:50:00 +0200365#endif /* CONFIG_PRELOADER */
wdenk8ed96042005-01-09 23:16:25 +0000366
367 ldr r2, _armboot_start
368 ldr r3, _bss_start
wdenk082acfd2005-01-10 00:01:04 +0000369 sub r2, r3, r2 /* r2 <- size of armboot */
370 add r2, r0, r2 /* r2 <- source end address */
wdenk8ed96042005-01-09 23:16:25 +0000371
372copy_loop:
373 ldmia r0!, {r3-r10} /* copy from source address [r0] */
374 stmia r1!, {r3-r10} /* copy to target address [r1] */
Albert Aribaudda90d4c2010-10-05 16:06:39 +0200375 cmp r0, r2 /* until source end address [r2] */
376 blo copy_loop
wdenk8aa1a2d2005-04-04 12:44:11 +0000377#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
wdenk8ed96042005-01-09 23:16:25 +0000378
379 /* Set up the stack */
380stack_setup:
381 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
Magnus Liljadf812382009-06-13 20:50:00 +0200382#ifdef CONFIG_PRELOADER
Kyungmin Park751b9b52008-01-17 16:43:25 +0900383 sub sp, r0, #128 /* leave 32 words for abort-stack */
384#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200385 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200386 sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
wdenk8ed96042005-01-09 23:16:25 +0000387#ifdef CONFIG_USE_IRQ
388 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
389#endif
390 sub sp, r0, #12 /* leave 3 words for abort-stack */
Magnus Liljadf812382009-06-13 20:50:00 +0200391#endif /* CONFIG_PRELOADER */
Vitaly Kuzmichev1a27f7d2010-06-15 22:18:11 +0400392 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
wdenk8ed96042005-01-09 23:16:25 +0000393
394clear_bss:
Heiko Schocherbafe7432010-10-13 07:57:14 +0200395 adr r2, _start
396 ldr r0, _bss_start_ofs /* find start of bss segment */
397 add r0, r0, r2
398 ldr r1, _bss_end_ofs /* stop here */
399 add r1, r1, r2
wdenk082acfd2005-01-10 00:01:04 +0000400 mov r2, #0x00000000 /* clear */
wdenk8ed96042005-01-09 23:16:25 +0000401
Magnus Liljadf812382009-06-13 20:50:00 +0200402#ifndef CONFIG_PRELOADER
wdenk082acfd2005-01-10 00:01:04 +0000403clbss_l:str r2, [r0] /* clear loop... */
wdenk8ed96042005-01-09 23:16:25 +0000404 add r0, r0, #4
405 cmp r0, r1
406 bne clbss_l
Kyungmin Park751b9b52008-01-17 16:43:25 +0900407#endif
wdenk8ed96042005-01-09 23:16:25 +0000408
Heiko Schocherbafe7432010-10-13 07:57:14 +0200409 ldr r0, _start_armboot_ofs
410 adr r1, _start
411 add r0, r0, r1
412 ldr pc, r0
wdenk8ed96042005-01-09 23:16:25 +0000413
Heiko Schocherbafe7432010-10-13 07:57:14 +0200414_start_armboot_ofs:
Magnus Lilja40c642b2009-06-13 20:50:01 +0200415#ifdef CONFIG_NAND_SPL
Heiko Schocherbafe7432010-10-13 07:57:14 +0200416 .word nand_boot - _start
Magnus Lilja40c642b2009-06-13 20:50:01 +0200417#else
Kyungmin Park751b9b52008-01-17 16:43:25 +0900418#ifdef CONFIG_ONENAND_IPL
Heiko Schocherbafe7432010-10-13 07:57:14 +0200419 .word start_oneboot - _start
Kyungmin Park751b9b52008-01-17 16:43:25 +0900420#else
Heiko Schocherbafe7432010-10-13 07:57:14 +0200421 .word start_armboot - _start
Magnus Lilja40c642b2009-06-13 20:50:01 +0200422#endif /* CONFIG_ONENAND_IPL */
423#endif /* CONFIG_NAND_SPL */
wdenk8ed96042005-01-09 23:16:25 +0000424
Heiko Schochere48b7c02010-09-17 13:10:40 +0200425#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
426
wdenk8ed96042005-01-09 23:16:25 +0000427/*
428 *************************************************************************
429 *
430 * CPU_init_critical registers
431 *
432 * setup important registers
433 * setup memory timing
434 *
435 *************************************************************************
436 */
Magnus Lilja40c642b2009-06-13 20:50:01 +0200437#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenk8ed96042005-01-09 23:16:25 +0000438cpu_init_crit:
439 /*
440 * flush v4 I/D caches
441 */
442 mov r0, #0
George G. Davis409a07c2010-05-11 10:15:36 -0400443 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
444 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
wdenk8ed96042005-01-09 23:16:25 +0000445
446 /*
447 * disable MMU stuff and caches
448 */
449 mrc p15, 0, r0, c1, c0, 0
450 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
451 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
452 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
wdenk8ed96042005-01-09 23:16:25 +0000453 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
wdenk8ed96042005-01-09 23:16:25 +0000454 mcr p15, 0, r0, c1, c0, 0
455
456 /*
wdenk082acfd2005-01-10 00:01:04 +0000457 * Jump to board specific initialization... The Mask ROM will have already initialized
458 * basic memory. Go here to bump up clock rate and handle wake up conditions.
wdenk8ed96042005-01-09 23:16:25 +0000459 */
wdenk082acfd2005-01-10 00:01:04 +0000460 mov ip, lr /* persevere link reg across call */
Wolfgang Denk87cb6862005-10-06 17:08:18 +0200461 bl lowlevel_init /* go setup pll,mux,memory */
wdenk082acfd2005-01-10 00:01:04 +0000462 mov lr, ip /* restore link */
463 mov pc, lr /* back to my caller */
Magnus Lilja40c642b2009-06-13 20:50:01 +0200464#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
Kyungmin Park751b9b52008-01-17 16:43:25 +0900465
Magnus Liljadf812382009-06-13 20:50:00 +0200466#ifndef CONFIG_PRELOADER
wdenk8ed96042005-01-09 23:16:25 +0000467/*
468 *************************************************************************
469 *
470 * Interrupt handling
471 *
472 *************************************************************************
473 */
474@
475@ IRQ stack frame.
476@
477#define S_FRAME_SIZE 72
478
479#define S_OLD_R0 68
480#define S_PSR 64
481#define S_PC 60
482#define S_LR 56
483#define S_SP 52
484
485#define S_IP 48
486#define S_FP 44
487#define S_R10 40
488#define S_R9 36
489#define S_R8 32
490#define S_R7 28
491#define S_R6 24
492#define S_R5 20
493#define S_R4 16
494#define S_R3 12
495#define S_R2 8
496#define S_R1 4
497#define S_R0 0
498
499#define MODE_SVC 0x13
500#define I_BIT 0x80
501
502/*
503 * use bad_save_user_regs for abort/prefetch/undef/swi ...
504 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
505 */
506
507 .macro bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000508 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
wdenk8ed96042005-01-09 23:16:25 +0000509 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
510
Heiko Schochere48b7c02010-09-17 13:10:40 +0200511#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
512 ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
513#else
Heiko Schocherbafe7432010-10-13 07:57:14 +0200514 adr r2, _start
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200515 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200516 sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200517#endif
wdenk082acfd2005-01-10 00:01:04 +0000518 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
wdenk8ed96042005-01-09 23:16:25 +0000519 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
520
521 add r5, sp, #S_SP
522 mov r1, lr
wdenk082acfd2005-01-10 00:01:04 +0000523 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
524 mov r0, sp @ save current stack into r0 (param register)
wdenk8ed96042005-01-09 23:16:25 +0000525 .endm
526
527 .macro irq_save_user_regs
528 sub sp, sp, #S_FRAME_SIZE
529 stmia sp, {r0 - r12} @ Calling r0-r12
wdenk082acfd2005-01-10 00:01:04 +0000530 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
531 stmdb r8, {sp, lr}^ @ Calling SP, LR
532 str lr, [r8, #0] @ Save calling PC
533 mrs r6, spsr
534 str r6, [r8, #4] @ Save CPSR
535 str r0, [r8, #8] @ Save OLD_R0
wdenk8ed96042005-01-09 23:16:25 +0000536 mov r0, sp
537 .endm
538
539 .macro irq_restore_user_regs
540 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
541 mov r0, r0
542 ldr lr, [sp, #S_PC] @ Get PC
543 add sp, sp, #S_FRAME_SIZE
544 subs pc, lr, #4 @ return & move spsr_svc into cpsr
545 .endm
546
547 .macro get_bad_stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200548#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
549 ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
550#else
Heiko Schocherbafe7432010-10-13 07:57:14 +0200551 adr r13, _start @ setup our mode stack (enter in banked mode)
552 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200553 sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200554#endif
wdenk8ed96042005-01-09 23:16:25 +0000555
556 str lr, [r13] @ save caller lr in position 0 of saved stack
wdenk082acfd2005-01-10 00:01:04 +0000557 mrs lr, spsr @ get the spsr
558 str lr, [r13, #4] @ save spsr in position 1 of saved stack
wdenk8ed96042005-01-09 23:16:25 +0000559
560 mov r13, #MODE_SVC @ prepare SVC-Mode
561 @ msr spsr_c, r13
wdenk082acfd2005-01-10 00:01:04 +0000562 msr spsr, r13 @ switch modes, make sure moves will execute
563 mov lr, pc @ capture return pc
564 movs pc, lr @ jump to next instruction & switch modes.
wdenk8ed96042005-01-09 23:16:25 +0000565 .endm
566
567 .macro get_bad_stack_swi
wdenk082acfd2005-01-10 00:01:04 +0000568 sub r13, r13, #4 @ space on current stack for scratch reg.
569 str r0, [r13] @ save R0's value.
Heiko Schochere48b7c02010-09-17 13:10:40 +0200570#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
571 ldr r0, IRQ_STACK_START_IN @ get data regions start
572#else
wdenk8ed96042005-01-09 23:16:25 +0000573 ldr r0, _armboot_start @ get data regions start
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200574 sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200575 sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
Heiko Schochere48b7c02010-09-17 13:10:40 +0200576#endif
wdenk8ed96042005-01-09 23:16:25 +0000577 str lr, [r0] @ save caller lr in position 0 of saved stack
wdenk082acfd2005-01-10 00:01:04 +0000578 mrs r0, spsr @ get the spsr
579 str lr, [r0, #4] @ save spsr in position 1 of saved stack
580 ldr r0, [r13] @ restore r0
581 add r13, r13, #4 @ pop stack entry
wdenk8ed96042005-01-09 23:16:25 +0000582 .endm
583
584 .macro get_irq_stack @ setup IRQ stack
585 ldr sp, IRQ_STACK_START
586 .endm
587
588 .macro get_fiq_stack @ setup FIQ stack
589 ldr sp, FIQ_STACK_START
590 .endm
Magnus Liljadf812382009-06-13 20:50:00 +0200591#endif /* CONFIG_PRELOADER */
wdenk8ed96042005-01-09 23:16:25 +0000592
593/*
594 * exception handlers
595 */
Magnus Liljadf812382009-06-13 20:50:00 +0200596#ifdef CONFIG_PRELOADER
Kyungmin Park751b9b52008-01-17 16:43:25 +0900597 .align 5
598do_hang:
599 ldr sp, _TEXT_BASE /* use 32 words about stack */
600 bl hang /* hang and never return */
Magnus Liljadf812382009-06-13 20:50:00 +0200601#else /* !CONFIG_PRELOADER */
wdenk082acfd2005-01-10 00:01:04 +0000602 .align 5
wdenk8ed96042005-01-09 23:16:25 +0000603undefined_instruction:
604 get_bad_stack
605 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000606 bl do_undefined_instruction
wdenk8ed96042005-01-09 23:16:25 +0000607
608 .align 5
609software_interrupt:
610 get_bad_stack_swi
611 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000612 bl do_software_interrupt
wdenk8ed96042005-01-09 23:16:25 +0000613
614 .align 5
615prefetch_abort:
616 get_bad_stack
617 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000618 bl do_prefetch_abort
wdenk8ed96042005-01-09 23:16:25 +0000619
620 .align 5
621data_abort:
622 get_bad_stack
623 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000624 bl do_data_abort
wdenk8ed96042005-01-09 23:16:25 +0000625
626 .align 5
627not_used:
628 get_bad_stack
629 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000630 bl do_not_used
wdenk8ed96042005-01-09 23:16:25 +0000631
632#ifdef CONFIG_USE_IRQ
633
634 .align 5
635irq:
636 get_irq_stack
637 irq_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000638 bl do_irq
wdenk8ed96042005-01-09 23:16:25 +0000639 irq_restore_user_regs
640
641 .align 5
642fiq:
643 get_fiq_stack
644 /* someone ought to write a more effiction fiq_save_user_regs */
645 irq_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000646 bl do_fiq
wdenk8ed96042005-01-09 23:16:25 +0000647 irq_restore_user_regs
648
649#else
650
651 .align 5
652irq:
653 get_bad_stack
654 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000655 bl do_irq
wdenk8ed96042005-01-09 23:16:25 +0000656
657 .align 5
658fiq:
659 get_bad_stack
660 bad_save_user_regs
wdenk082acfd2005-01-10 00:01:04 +0000661 bl do_fiq
wdenk8ed96042005-01-09 23:16:25 +0000662
663#endif
664 .align 5
665.global arm1136_cache_flush
666arm1136_cache_flush:
Heiko Schocher7e4a9e62010-09-17 13:10:32 +0200667#if !defined(CONFIG_SYS_NO_ICACHE)
wdenk8ed96042005-01-09 23:16:25 +0000668 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
Heiko Schocher7e4a9e62010-09-17 13:10:32 +0200669#endif
670#if !defined(CONFIG_SYS_NO_DCACHE)
671 mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
672#endif
wdenk8ed96042005-01-09 23:16:25 +0000673 mov pc, lr @ back to caller
Magnus Liljadf812382009-06-13 20:50:00 +0200674#endif /* CONFIG_PRELOADER */