blob: 3b86309b13c995d7aeb621a15d864afab734986d [file] [log] [blame]
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +01001/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2/*
3 * Copyright (c) 2018 Microsemi Corporation
4 */
5
6#ifndef __VCOREIII_H
7#define __VCOREIII_H
8
9#include <linux/sizes.h>
10
11/* Onboard devices */
12
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +010013#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
14
Horatiu Vultur1895b872019-01-23 16:39:42 +010015#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
16#define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +010017#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
18#else
Horatiu Vultur1895b872019-01-23 16:39:42 +010019#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +010020#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
21#endif
22#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ
23
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +010024#define CONFIG_SYS_SDRAM_BASE 0x80000000
25#if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
26#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
27#elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
28#define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M)
29#elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
30#define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M)
31#else
32#error Unknown DDR size - please add!
33#endif
34
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +010035#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
36
Gregory CLEMENT6787c1e2018-12-14 16:16:49 +010037#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
38#define VCOREIII_DEFAULT_MTD_ENV \
39 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
40 "mtdids="CONFIG_MTDIDS_DEFAULT"\0"
41#else
42#define VCOREIII_DEFAULT_MTD_ENV /* Go away */
43#endif
44
45#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
46
47#define CONFIG_EXTRA_ENV_SETTINGS \
48 VCOREIII_DEFAULT_MTD_ENV \
49 "loadaddr=0x81000000\0" \
50 "spi_image_off=0x00100000\0" \
51 "console=ttyS0,115200\0" \
52 "setup=setenv bootargs console=${console} ${mtdparts}" \
53 "${bootargs_extra}\0" \
54 "spiboot=run setup; sf probe; sf read ${loadaddr}" \
55 "${spi_image_off} 0x600000; bootm ${loadaddr}\0" \
56 "ubootfile=u-boot.bin\0" \
57 "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \
58 "sf erase UBoot 0x100000;" \
59 "sf write ${loadaddr} UBoot ${filesize}\0" \
60 "bootcmd=run spiboot\0" \
61 ""
62#endif /* __VCOREIII_H */