Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") |
| 9 | OUTPUT_ARCH (arm) |
| 10 | ENTRY (_start) |
| 11 | SECTIONS |
| 12 | { |
| 13 | . = 0x00000000; |
| 14 | |
| 15 | . = ALIGN (4); |
| 16 | .text : { |
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 17 | *(.__image_copy_start) |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 18 | arch/arm/cpu/ixp/start.o(.text*) |
Masahiro Yamada | e2906a5 | 2013-11-11 14:36:00 +0900 | [diff] [blame] | 19 | net/built-in.o(.text*) |
| 20 | board/dvlhost/built-in.o(.text*) |
| 21 | arch/arm/cpu/ixp/built-in.o(.text*) |
| 22 | drivers/serial/built-in.o(.text*) |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 23 | |
| 24 | . = env_offset; |
| 25 | common/env_embedded.o(.ppcenv) |
| 26 | *(.text*) |
| 27 | } |
| 28 | |
| 29 | . = ALIGN (4); |
| 30 | .rodata : { |
| 31 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
| 32 | } |
| 33 | . = ALIGN (4); |
| 34 | .data : { |
| 35 | *(.data*) |
| 36 | } |
| 37 | . = ALIGN (4); |
| 38 | .got : { |
| 39 | *(.got) |
| 40 | } |
| 41 | . =.; |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 42 | |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 43 | . = ALIGN(4); |
| 44 | .u_boot_list : { |
Albert ARIBAUD | ef123c5 | 2013-02-25 00:59:00 +0000 | [diff] [blame] | 45 | KEEP(*(SORT(.u_boot_list*))); |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 46 | } |
| 47 | |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 48 | . = ALIGN (4); |
Benoît Thébaudeau | 7086e91 | 2013-04-11 09:35:46 +0000 | [diff] [blame] | 49 | |
Albert ARIBAUD | d026dec | 2013-06-11 14:17:33 +0200 | [diff] [blame] | 50 | .image_copy_end : |
| 51 | { |
| 52 | *(.__image_copy_end) |
| 53 | } |
Benoît Thébaudeau | 7086e91 | 2013-04-11 09:35:46 +0000 | [diff] [blame] | 54 | |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 55 | .rel_dyn_start : |
| 56 | { |
| 57 | *(.__rel_dyn_start) |
| 58 | } |
| 59 | |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 60 | .rel.dyn : { |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 61 | *(.rel*) |
Albert ARIBAUD | 47bd65e | 2013-06-11 14:17:34 +0200 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | .rel_dyn_end : |
| 65 | { |
| 66 | *(.__rel_dyn_end) |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 67 | } |
| 68 | |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 69 | _end = .; |
| 70 | |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 71 | /* |
| 72 | * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c |
| 73 | * __bss_base and __bss_limit are for linker only (overlay ordering) |
| 74 | */ |
| 75 | |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 76 | .bss_start __rel_dyn_start (OVERLAY) : { |
| 77 | KEEP(*(.__bss_start)); |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 78 | __bss_base = .; |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 79 | } |
| 80 | |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 81 | .bss __bss_base (OVERLAY) : { |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 82 | *(.bss*) |
| 83 | . = ALIGN(4); |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 84 | __bss_limit = .; |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 85 | } |
Albert ARIBAUD | f84a7b8 | 2013-04-11 05:43:21 +0000 | [diff] [blame] | 86 | .bss_end __bss_limit (OVERLAY) : { |
| 87 | KEEP(*(.__bss_end)); |
Albert ARIBAUD | 3ebd1cb | 2013-02-25 00:58:59 +0000 | [diff] [blame] | 88 | } |
| 89 | |
Albert ARIBAUD | 09d8118 | 2013-06-11 14:17:31 +0200 | [diff] [blame] | 90 | /DISCARD/ : { *(.dynsym) } |
Michael Schwingen | 10c9787 | 2011-05-23 00:00:09 +0200 | [diff] [blame] | 91 | /DISCARD/ : { *(.dynstr*) } |
| 92 | /DISCARD/ : { *(.dynamic*) } |
| 93 | /DISCARD/ : { *(.plt*) } |
| 94 | /DISCARD/ : { *(.interp*) } |
| 95 | /DISCARD/ : { *(.gnu*) } |
| 96 | } |