Michael Schwingen | ea99e8f | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * hardware register definitions for the AcTux-1 board. |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef _ACTUX1_HW_H |
| 27 | #define _ACTUX1_HW_H |
| 28 | |
| 29 | /* 0 = LED off,1 = green, 2 = red, 3 = orange */ |
| 30 | #define ACTUX1_LED1(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0) |
| 31 | #define ACTUX1_LED2(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1) |
| 32 | #define ACTUX1_LED3(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2) |
| 33 | #define ACTUX1_LED4(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 3) |
| 34 | #define ACTUX1_LED5(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 4) |
| 35 | #define ACTUX1_LED6(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 5) |
| 36 | #define ACTUX1_LED7(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 6) |
| 37 | #define ACTUX1_HS(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7) |
| 38 | #define ACTUX1_HS_DCD 0x01 |
| 39 | #define ACTUX1_HS_DSR 0x02 |
| 40 | |
| 41 | #define ACTUX1_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS |
| 42 | #define ACTUX1_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F) |
| 43 | |
| 44 | /* GPIO settings */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_GPIO_PCI1_INTA 2 |
| 46 | #define CONFIG_SYS_GPIO_PCI2_INTA 3 |
| 47 | #define CONFIG_SYS_GPIO_I2C_SDA 4 |
| 48 | #define CONFIG_SYS_GPIO_I2C_SCL 5 |
| 49 | #define CONFIG_SYS_GPIO_DBGJUMPER 9 |
| 50 | #define CONFIG_SYS_GPIO_BUTTON1 10 |
| 51 | #define CONFIG_SYS_GPIO_DBGSENSE 11 |
| 52 | #define CONFIG_SYS_GPIO_DTR 12 |
| 53 | #define CONFIG_SYS_GPIO_IORST 13 /* Out */ |
| 54 | #define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */ |
| 55 | #define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */ |
Michael Schwingen | ea99e8f | 2008-01-16 19:50:37 +0100 | [diff] [blame] | 56 | |
| 57 | #endif |