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gerrit.cesnet.cz / github / trini / u-boot / 29e0cfb4f77f7aa369136302cee14a91e22dca71 / . / arch / arm / mach-uniphier / memconf / memconf.c
blob: 3d4b50456b65e254785f3becbe21847e08113708 [file] [log] [blame]
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]1/*
2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <linux/err.h>
9#include <linux/io.h>
10#include <linux/sizes.h>
Masahiro Yamada107b3fb2016-01-09 01:51:13 +0900[diff] [blame]11
12#include "../init.h"
13#include "../sg-regs.h"
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]14
15int memconf_init(const struct uniphier_board_data *bd)
16{
17 u32 tmp = 0;
18 unsigned long size_per_word;
19
20 tmp = readl(SG_MEMCONF);
21
22 tmp &= ~(SG_MEMCONF_CH0_SZ_MASK | SG_MEMCONF_CH0_NUM_MASK);
23
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]24 switch (bd->dram_ch[0].width) {
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]25 case 16:
26 tmp |= SG_MEMCONF_CH0_NUM_1;
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]27 size_per_word = bd->dram_ch[0].size;
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]28 break;
29 case 32:
30 tmp |= SG_MEMCONF_CH0_NUM_2;
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]31 size_per_word = bd->dram_ch[0].size >> 1;
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]32 break;
33 default:
34 pr_err("error: unsupported DRAM Ch0 width\n");
35 return -EINVAL;
36 }
37
38 /* Set DDR size */
39 switch (size_per_word) {
40 case SZ_64M:
41 tmp |= SG_MEMCONF_CH0_SZ_64M;
42 break;
43 case SZ_128M:
44 tmp |= SG_MEMCONF_CH0_SZ_128M;
45 break;
46 case SZ_256M:
47 tmp |= SG_MEMCONF_CH0_SZ_256M;
48 break;
49 case SZ_512M:
50 tmp |= SG_MEMCONF_CH0_SZ_512M;
51 break;
52 case SZ_1G:
53 tmp |= SG_MEMCONF_CH0_SZ_1G;
54 break;
55 default:
56 pr_err("error: unsupported DRAM Ch0 size\n");
57 return -EINVAL;
58 }
59
60 tmp &= ~(SG_MEMCONF_CH1_SZ_MASK | SG_MEMCONF_CH1_NUM_MASK);
61
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]62 switch (bd->dram_ch[1].width) {
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]63 case 16:
64 tmp |= SG_MEMCONF_CH1_NUM_1;
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]65 size_per_word = bd->dram_ch[1].size;
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]66 break;
67 case 32:
68 tmp |= SG_MEMCONF_CH1_NUM_2;
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]69 size_per_word = bd->dram_ch[1].size >> 1;
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]70 break;
71 default:
72 pr_err("error: unsupported DRAM Ch1 width\n");
73 return -EINVAL;
74 }
75
76 switch (size_per_word) {
77 case SZ_64M:
78 tmp |= SG_MEMCONF_CH1_SZ_64M;
79 break;
80 case SZ_128M:
81 tmp |= SG_MEMCONF_CH1_SZ_128M;
82 break;
83 case SZ_256M:
84 tmp |= SG_MEMCONF_CH1_SZ_256M;
85 break;
86 case SZ_512M:
87 tmp |= SG_MEMCONF_CH1_SZ_512M;
88 break;
89 case SZ_1G:
90 tmp |= SG_MEMCONF_CH1_SZ_1G;
91 break;
92 default:
93 pr_err("error: unsupported DRAM Ch1 size\n");
94 return -EINVAL;
95 }
96
Masahiro Yamada46abfcc2016-02-26 14:21:34 +0900[diff] [blame]97 if (bd->dram_ch[0].base + bd->dram_ch[0].size < bd->dram_ch[1].base)
Masahiro Yamada323d1f92015-09-22 00:27:39 +0900[diff] [blame]98 tmp |= SG_MEMCONF_SPARSEMEM;
99 else
100 tmp &= ~SG_MEMCONF_SPARSEMEM;
101
102 writel(tmp, SG_MEMCONF);
103
104 return 0;
105}