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Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00001/*
2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
3 *
Tom Rini0b179982013-07-24 09:34:30 -04004 * SPDX-License-Identifier: GPL-2.0
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00005 */
6
Paul Burton7a9d1092013-11-09 10:22:08 +00007#ifndef _MALTA_CONFIG_H
8#define _MALTA_CONFIG_H
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +00009
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000010/*
11 * System configuration
12 */
Paul Burton7a9d1092013-11-09 10:22:08 +000013#define CONFIG_MALTA
Paul Burton5f978d72014-04-07 10:11:23 +010014#define CONFIG_BOARD_EARLY_INIT_F
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000015
Gabor Juhosab413052013-10-24 14:32:00 +020016#define CONFIG_MEMSIZE_IN_BYTES
17
Gabor Juhosfeaa6062013-05-22 03:57:42 +000018#define CONFIG_PCI
19#define CONFIG_PCI_GT64120
Paul Burtonbaf37f02013-11-08 11:18:50 +000020#define CONFIG_PCI_MSC01
Gabor Juhosfeaa6062013-05-22 03:57:42 +000021#define CONFIG_PCI_PNP
Gabor Juhosf1957492013-05-22 03:57:44 +000022#define CONFIG_PCNET
Paul Burtone0878af2013-11-08 11:18:52 +000023#define CONFIG_PCNET_79C973
24#define PCNET_HAS_PROM
Gabor Juhosfeaa6062013-05-22 03:57:42 +000025
Paul Burton3ced12a2013-11-08 11:18:55 +000026#define CONFIG_MISC_INIT_R
27#define CONFIG_RTC_MC146818
28#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
29
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000030/*
31 * CPU Configuration
32 */
33#define CONFIG_SYS_MHZ 250 /* arbitrary value */
34#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000035
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000036/*
37 * Memory map
38 */
Gabor Juhos10473d02013-11-12 16:47:32 +010039#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000040
Paul Burton0f832b92016-05-26 14:49:36 +010041#ifdef CONFIG_64BIT
42# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
43#else
44# define CONFIG_SYS_SDRAM_BASE 0x80000000
45#endif
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000046#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
47
48#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
49
Paul Burton0f832b92016-05-26 14:49:36 +010050#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
51#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
52#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000053
54#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
55#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton67d47522013-11-26 17:45:28 +000056#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000057
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000058#define CONFIG_SYS_CBSIZE 256
59#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
60 sizeof(CONFIG_SYS_PROMPT) + 16)
61#define CONFIG_SYS_MAXARGS 16
62
63#define CONFIG_AUTO_COMPLETE
64#define CONFIG_CMDLINE_EDITING
65
66/*
67 * Serial driver
68 */
69#define CONFIG_BAUDRATE 115200
Paul Burton2e7eb122016-05-17 07:43:27 +010070#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000071
72/*
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000073 * Flash configuration
74 */
Paul Burton0f832b92016-05-26 14:49:36 +010075#ifdef CONFIG_64BIT
76# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
77#else
78# define CONFIG_SYS_FLASH_BASE 0xbe000000
79#endif
Gabor Juhos52caee02013-05-22 03:57:39 +000080#define CONFIG_SYS_MAX_FLASH_BANKS 1
81#define CONFIG_SYS_MAX_FLASH_SECT 128
82#define CONFIG_SYS_FLASH_CFI
83#define CONFIG_FLASH_CFI_DRIVER
84#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +000085
86/*
Paul Burtonfba6f452013-11-08 11:18:56 +000087 * Environment
88 */
89#define CONFIG_ENV_IS_IN_FLASH
90#define CONFIG_ENV_SECT_SIZE 0x20000
91#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
92#define CONFIG_ENV_ADDR \
93 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
94
95/*
Paul Burtonba21a452015-01-29 10:38:20 +000096 * IDE/ATA
97 */
98#define CONFIG_SYS_IDE_MAXBUS 1
99#define CONFIG_SYS_IDE_MAXDEVICE 2
100#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
101#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
102#define CONFIG_SYS_ATA_DATA_OFFSET 0
103#define CONFIG_SYS_ATA_REG_OFFSET 0
104
105/*
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +0000106 * Commands
107 */
Paul Burton3ced12a2013-11-08 11:18:55 +0000108#define CONFIG_CMD_DATE
Paul Burtonba21a452015-01-29 10:38:20 +0000109#define CONFIG_CMD_IDE
Gabor Juhosfeaa6062013-05-22 03:57:42 +0000110#define CONFIG_CMD_PCI
111
Gabor Juhos5a4dcfa2013-05-22 03:57:37 +0000112#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
113
Paul Burton7a9d1092013-11-09 10:22:08 +0000114#endif /* _MALTA_CONFIG_H */