Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_LS1012AFRWY=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x40100000 |
Tom Rini | 3eae864 | 2018-07-09 15:13:08 -0400 | [diff] [blame] | 4 | CONFIG_SECURE_BOOT=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 5 | CONFIG_FSL_LS_PPA=y |
Peng Ma | 281ffa5 | 2019-01-30 19:18:43 +0800 | [diff] [blame^] | 6 | CONFIG_AHCI=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 7 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | 86cf1c8 | 2018-08-16 08:16:24 -0400 | [diff] [blame] | 8 | CONFIG_NR_DRAM_BANKS=2 |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 9 | # CONFIG_SYS_MALLOC_F is not set |
| 10 | CONFIG_FIT_VERBOSE=y |
| 11 | CONFIG_OF_BOARD_SETUP=y |
| 12 | CONFIG_OF_STDOUT_VIA_ALIAS=y |
| 13 | CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" |
| 14 | CONFIG_QSPI_BOOT=y |
| 15 | CONFIG_BOOTDELAY=10 |
| 16 | CONFIG_USE_BOOTARGS=y |
| 17 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" |
| 18 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 19 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 20 | CONFIG_CMD_GREPENV=y |
| 21 | CONFIG_CMD_GPT=y |
| 22 | CONFIG_CMD_I2C=y |
| 23 | CONFIG_CMD_MMC=y |
| 24 | CONFIG_CMD_PCI=y |
| 25 | CONFIG_CMD_SF=y |
| 26 | CONFIG_CMD_USB=y |
| 27 | CONFIG_CMD_CACHE=y |
| 28 | CONFIG_OF_CONTROL=y |
Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 29 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 30 | CONFIG_NET_RANDOM_ETHADDR=y |
| 31 | CONFIG_DM=y |
Peng Ma | 281ffa5 | 2019-01-30 19:18:43 +0800 | [diff] [blame^] | 32 | CONFIG_SATA_CEVA=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 33 | CONFIG_DM_MMC=y |
Tom Rini | 592cd5d | 2018-10-02 13:02:22 -0400 | [diff] [blame] | 34 | CONFIG_DM_SPI_FLASH=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 35 | CONFIG_SPI_FLASH=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 36 | CONFIG_SPI_FLASH_WINBOND=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 37 | CONFIG_FSL_PFE=y |
Tom Rini | 3eae864 | 2018-07-09 15:13:08 -0400 | [diff] [blame] | 38 | CONFIG_DM_ETH=y |
| 39 | CONFIG_E1000=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 40 | CONFIG_PCI=y |
| 41 | CONFIG_DM_PCI=y |
| 42 | CONFIG_DM_PCI_COMPAT=y |
| 43 | CONFIG_PCIE_LAYERSCAPE=y |
Peng Ma | 281ffa5 | 2019-01-30 19:18:43 +0800 | [diff] [blame^] | 44 | CONFIG_DM_SCSI=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 45 | CONFIG_SYS_NS16550=y |
Tom Rini | 592cd5d | 2018-10-02 13:02:22 -0400 | [diff] [blame] | 46 | CONFIG_SPI=y |
| 47 | CONFIG_DM_SPI=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 48 | CONFIG_USB=y |
| 49 | CONFIG_DM_USB=y |
| 50 | CONFIG_USB_XHCI_HCD=y |
| 51 | CONFIG_USB_XHCI_DWC3=y |
Vinitha V Pillai | 2d91b53 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 52 | CONFIG_RSA=y |
| 53 | CONFIG_RSA_SOFTWARE_EXP=y |