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Heiko Schocherb89ac722013-12-02 07:47:23 +01001/*
2 * Common board functions for siemens AT91SAM9G45 based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9m10g45ek.h
7 * (C) Copyright 2007-2008
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
17#include <asm/hardware.h>
18
19#define MACH_TYPE_CORVUS 2066
20
Heiko Schochera5f8cca2014-11-18 11:53:53 +010021#define CONFIG_MACH_TYPE MACH_TYPE_CORVUS
Heiko Schocherd0b37232014-10-01 07:26:06 +020022#define CONFIG_SYS_GENERIC_BOARD
Heiko Schocherb89ac722013-12-02 07:47:23 +010023/*
24 * Warning: changing CONFIG_SYS_TEXT_BASE requires
25 * adapting the initial boot program.
26 * Since the linker has to swallow that define, we must use a pure
27 * hex number here!
28 */
29
Heiko Schocher5b15fd92014-10-31 08:31:06 +010030#define CONFIG_SYS_TEXT_BASE 0x72000000
Heiko Schocherb89ac722013-12-02 07:47:23 +010031
Heiko Schocherb89ac722013-12-02 07:47:23 +010032#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
33
34/* ARM asynchronous clock */
35#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
36#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
Heiko Schocherb89ac722013-12-02 07:47:23 +010037
Heiko Schocherb89ac722013-12-02 07:47:23 +010038#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39#define CONFIG_SETUP_MEMORY_TAGS
40#define CONFIG_INITRD_TAG
41#define CONFIG_SKIP_LOWLEVEL_INIT
42#define CONFIG_BOARD_EARLY_INIT_F
43#define CONFIG_DISPLAY_CPUINFO
44
45#define CONFIG_CMD_BOOTZ
46#define CONFIG_OF_LIBFDT
47
48/* general purpose I/O */
49#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
50#define CONFIG_AT91_GPIO
51#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
52
53/* serial console */
54#define CONFIG_ATMEL_USART
55#define CONFIG_USART_BASE ATMEL_BASE_DBGU
56#define CONFIG_USART_ID ATMEL_ID_SYS
57
58/* LED */
59#define CONFIG_AT91_LED
60#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
61#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
62
63#define CONFIG_BOOTDELAY 3
64
65/*
66 * BOOTP options
67 */
68#define CONFIG_BOOTP_BOOTFILESIZE
69#define CONFIG_BOOTP_BOOTPATH
70#define CONFIG_BOOTP_GATEWAY
71#define CONFIG_BOOTP_HOSTNAME
72
73/*
74 * Command line configuration.
75 */
76#include <config_cmd_default.h>
77#undef CONFIG_CMD_BDI
78#undef CONFIG_CMD_FPGA
79#undef CONFIG_CMD_IMI
80#undef CONFIG_CMD_IMLS
81#undef CONFIG_CMD_LOADS
82
83#define CONFIG_CMD_PING
84#define CONFIG_CMD_DHCP
85#define CONFIG_CMD_NAND
86#define CONFIG_CMD_USB
87
88/* SDRAM */
89#define CONFIG_NR_DRAM_BANKS 1
90#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
91#define CONFIG_SYS_SDRAM_SIZE 0x08000000
92
93#define CONFIG_SYS_INIT_SP_ADDR \
94 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
95
96/* No NOR flash */
97#define CONFIG_SYS_NO_FLASH
98
99/* NAND flash */
100#ifdef CONFIG_CMD_NAND
101#define CONFIG_NAND_ATMEL
102#define CONFIG_SYS_MAX_NAND_DEVICE 1
103#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
104#define CONFIG_SYS_NAND_DBW_8
105/* our ALE is AD21 */
106#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
107/* our CLE is AD22 */
108#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
109#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
Heiko Schochera5f8cca2014-11-18 11:53:53 +0100110#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
Heiko Schocherb89ac722013-12-02 07:47:23 +0100111#endif
112
113/* Ethernet */
114#define CONFIG_MACB
115#define CONFIG_RMII
116#define CONFIG_NET_RETRY_COUNT 20
117#define CONFIG_AT91_WANTS_COMMON_PHY
118
119/* USB */
120#define CONFIG_USB_EHCI
121#define CONFIG_USB_EHCI_ATMEL
122#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
123#define CONFIG_DOS_PARTITION
124#define CONFIG_USB_STORAGE
125
126#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
127
128/* bootstrap + u-boot + env in nandflash */
129#define CONFIG_ENV_IS_IN_NAND
130#define CONFIG_ENV_OFFSET 0x100000
131#define CONFIG_ENV_OFFSET_REDUND 0x180000
132#define CONFIG_ENV_SIZE 0x20000
133
134#define CONFIG_BOOTCOMMAND \
135 "nand read 0x70000000 0x200000 0x300000;" \
136 "bootm 0x70000000"
137#define CONFIG_BOOTARGS \
138 "console=ttyS0,115200 earlyprintk " \
139 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
140 "256k(env),256k(env_redundant),256k(spare)," \
141 "512k(dtb),6M(kernel)ro,-(rootfs) " \
142 "root=/dev/mtdblock7 rw rootfstype=jffs2"
143
144#define CONFIG_BAUDRATE 115200
145
146#define CONFIG_SYS_PROMPT "U-Boot> "
147#define CONFIG_SYS_CBSIZE 256
148#define CONFIG_SYS_MAXARGS 16
149#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
150 sizeof(CONFIG_SYS_PROMPT) + 16)
151#define CONFIG_SYS_LONGHELP
152#define CONFIG_CMDLINE_EDITING
153#define CONFIG_AUTO_COMPLETE
154#define CONFIG_SYS_HUSH_PARSER
155
156/*
157 * Size of malloc() pool
158 */
159#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
160 128*1024, 0x1000)
Heiko Schocher5b15fd92014-10-31 08:31:06 +0100161/* Defines for SPL */
162#define CONFIG_SPL_FRAMEWORK
163#define CONFIG_SPL_TEXT_BASE 0x300000
164#define CONFIG_SPL_MAX_SIZE (12 * 1024)
165#define CONFIG_SPL_STACK (16 * 1024)
166
167#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
168#define CONFIG_SPL_BSS_MAX_SIZE (2 * 1024)
169
170#define CONFIG_SPL_LIBCOMMON_SUPPORT
171#define CONFIG_SPL_LIBGENERIC_SUPPORT
172#define CONFIG_SPL_SERIAL_SUPPORT
173
174#define CONFIG_SPL_BOARD_INIT
175#define CONFIG_SPL_GPIO_SUPPORT
Heiko Schocher5b15fd92014-10-31 08:31:06 +0100176#define CONFIG_SPL_NAND_SUPPORT
177#define CONFIG_SPL_NAND_DRIVERS
178#define CONFIG_SPL_NAND_BASE
179#define CONFIG_SPL_NAND_ECC
180#define CONFIG_SPL_NAND_RAW_ONLY
181#define CONFIG_SPL_NAND_SOFTECC
182#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
183#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
184#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
185#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
186#define CONFIG_SYS_NAND_5_ADDR_CYCLE
187
Heiko Schocher5b15fd92014-10-31 08:31:06 +0100188#define CONFIG_SYS_NAND_PAGE_SIZE 2048
189#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
190#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
191 CONFIG_SYS_NAND_PAGE_SIZE)
192#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
193#define CONFIG_SYS_NAND_ECCSIZE 256
194#define CONFIG_SYS_NAND_ECCBYTES 3
195#define CONFIG_SYS_NAND_OOBSIZE 64
196#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
197 48, 49, 50, 51, 52, 53, 54, 55, \
198 56, 57, 58, 59, 60, 61, 62, 63, }
199
200#define CONFIG_SPL_ATMEL_SIZE
201#define CONFIG_SYS_MASTER_CLOCK 132096000
202#define AT91_PLL_LOCK_TIMEOUT 1000000
203#define CONFIG_SYS_AT91_PLLA 0x20c73f03
204#define CONFIG_SYS_MCKR 0x1301
205#define CONFIG_SYS_MCKR_CSS 0x1302
206
207#define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC0
Heiko Schocherb89ac722013-12-02 07:47:23 +0100208
209#endif