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Heiko Schocher0f8bc282013-12-02 07:47:22 +01001/*
2 * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright Siemens AG
4 *
5 * Based on:
6 * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#include <common.h>
16#include <asm/io.h>
17#include <asm/arch/at91sam9260_matrix.h>
18#include <asm/arch/at91sam9_smc.h>
19#include <asm/arch/at91_common.h>
20#include <asm/arch/at91_pmc.h>
21#include <asm/arch/at91_rstc.h>
22#include <asm/arch/gpio.h>
23#include <asm/arch/at91sam9_sdramc.h>
Heiko Schocher237e3792014-10-31 08:31:05 +010024#include <asm/arch/clk.h>
25#include <linux/mtd/nand.h>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010026#include <atmel_mci.h>
Heiko Schocher50921cd2014-10-31 08:30:56 +010027#include <asm/arch/at91_spi.h>
28#include <spi.h>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010029
30#include <net.h>
31#include <netdev.h>
32
33DECLARE_GLOBAL_DATA_PTR;
34
Heiko Schocher0f8bc282013-12-02 07:47:22 +010035static void taurus_nand_hw_init(void)
36{
37 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
38 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
39 unsigned long csa;
40
41 /* Assign CS3 to NAND/SmartMedia Interface */
42 csa = readl(&matrix->ebicsa);
43 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
44 writel(csa, &matrix->ebicsa);
45
46 /* Configure SMC CS3 for NAND/SmartMedia */
47 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
48 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
49 &smc->cs[3].setup);
50 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
51 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
52 &smc->cs[3].pulse);
53 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
54 &smc->cs[3].cycle);
55 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
56 AT91_SMC_MODE_EXNW_DISABLE |
57 AT91_SMC_MODE_DBW_8 |
58 AT91_SMC_MODE_TDF_CYCLE(3),
59 &smc->cs[3].mode);
60
61 /* Configure RDY/BSY */
62 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
63
64 /* Enable NandFlash */
65 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
66}
Heiko Schocher237e3792014-10-31 08:31:05 +010067
68#if defined(CONFIG_SPL_BUILD)
69#include <spl.h>
70#include <nand.h>
Heiko Schochera1655bb2014-11-18 09:41:58 +010071#include <spi_flash.h>
Heiko Schocher237e3792014-10-31 08:31:05 +010072
73void matrix_init(void)
74{
75 struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
76
77 writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
78 | AT91_MATRIX_SLOT_CYCLE_(0x40),
79 &mat->scfg[3]);
80}
81
82void at91_spl_board_init(void)
83{
84 taurus_nand_hw_init();
Heiko Schochera1655bb2014-11-18 09:41:58 +010085 at91_spi0_hw_init(TAURUS_SPI_MASK);
Heiko Schocher237e3792014-10-31 08:31:05 +010086
87 /* Configure recovery button PINs */
88 at91_set_gpio_input(AT91_PIN_PA31, 1);
89
90 /* check if button is pressed */
91 if (at91_get_gpio_value(AT91_PIN_PA31) == 0) {
Heiko Schochera1655bb2014-11-18 09:41:58 +010092 struct spi_flash *flash;
Heiko Schocher237e3792014-10-31 08:31:05 +010093
94 debug("Recovery button pressed\n");
Heiko Schochera1655bb2014-11-18 09:41:58 +010095 nand_init();
96 spl_nand_erase_one(0, 0);
97 flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
98 0,
99 CONFIG_SF_DEFAULT_SPEED,
100 SPI_MODE_3);
101 if (!flash) {
102 puts("no flash\n");
103 } else {
104 puts("erase spi flash sector 0\n");
105 spi_flash_erase(flash, 0,
106 CONFIG_SYS_NAND_U_BOOT_SIZE);
Heiko Schocher237e3792014-10-31 08:31:05 +0100107 }
108 }
109}
110
111void mem_init(void)
112{
113 struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
114 struct sdramc_reg setting;
115
116 at91_sdram_hw_init();
117 setting.cr = (AT91_SDRAMC_NC_9 |
118 AT91_SDRAMC_NR_13 |
119 AT91_SDRAMC_CAS_3 |
120 AT91_SDRAMC_NB_4 |
121 AT91_SDRAMC_DBW_32 |
122 AT91_SDRAMC_TWR_VAL(3) |
123 AT91_SDRAMC_TRC_VAL(9) |
124 AT91_SDRAMC_TRP_VAL(3) |
125 AT91_SDRAMC_TRCD_VAL(3) |
126 AT91_SDRAMC_TRAS_VAL(6) |
127 AT91_SDRAMC_TXSR_VAL(10));
128 setting.mdr = AT91_SDRAMC_MD_SDRAM;
129 setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
130
131
132 writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
133 AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
134 &ma->ebicsa);
135 sdramc_initialize(ATMEL_BASE_CS1, &setting);
136}
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100137#endif
138
139#ifdef CONFIG_MACB
140static void taurus_macb_hw_init(void)
141{
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100142 /* Enable EMAC clock */
Heiko Schocher237e3792014-10-31 08:31:05 +0100143 at91_periph_clk_enable(ATMEL_ID_EMAC0);
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100144
145 /*
146 * Disable pull-up on:
147 * RXDV (PA17) => PHY normal mode (not Test mode)
148 * ERX0 (PA14) => PHY ADDR0
149 * ERX1 (PA15) => PHY ADDR1
150 * ERX2 (PA25) => PHY ADDR2
151 * ERX3 (PA26) => PHY ADDR3
152 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
153 *
154 * PHY has internal pull-down
155 */
156 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
157 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
158 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
159 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
160 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
161 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
162
163 at91_phy_reset();
164
165 at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
166
167 /* Re-enable pull-up */
168 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
169 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
170 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
171 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
172 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
173 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
174
175 /* Initialize EMAC=MACB hardware */
176 at91_macb_hw_init();
177}
178#endif
179
180#ifdef CONFIG_GENERIC_ATMEL_MCI
181int board_mmc_init(bd_t *bd)
182{
183 at91_mci_hw_init();
184
185 return atmel_mci_init((void *)ATMEL_BASE_MCI);
186}
187#endif
188
189int board_early_init_f(void)
190{
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100191 /* Enable clocks for all PIOs */
Heiko Schocher237e3792014-10-31 08:31:05 +0100192 at91_periph_clk_enable(ATMEL_ID_PIOA);
193 at91_periph_clk_enable(ATMEL_ID_PIOB);
194 at91_periph_clk_enable(ATMEL_ID_PIOC);
195
196 at91_seriald_hw_init();
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100197
198 return 0;
199}
200
Heiko Schocher50921cd2014-10-31 08:30:56 +0100201int spi_cs_is_valid(unsigned int bus, unsigned int cs)
202{
203 return bus == 0 && cs == 0;
204}
205
206void spi_cs_activate(struct spi_slave *slave)
207{
208 at91_set_gpio_value(TAURUS_SPI_CS_PIN, 0);
209}
210
211void spi_cs_deactivate(struct spi_slave *slave)
212{
213 at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
214}
215
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100216int board_init(void)
217{
218 /* adress of boot parameters */
219 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
220
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100221#ifdef CONFIG_CMD_NAND
222 taurus_nand_hw_init();
223#endif
224#ifdef CONFIG_MACB
225 taurus_macb_hw_init();
226#endif
Heiko Schocher50921cd2014-10-31 08:30:56 +0100227 at91_spi0_hw_init(TAURUS_SPI_MASK);
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100228
229 return 0;
230}
231
232int dram_init(void)
233{
234 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
235 CONFIG_SYS_SDRAM_SIZE);
236 return 0;
237}
238
239int board_eth_init(bd_t *bis)
240{
241 int rc = 0;
242#ifdef CONFIG_MACB
243 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
244#endif
245 return rc;
246}