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wdenk80885a92004-02-26 23:46:20 +00001/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
3 *
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * (C) Copyright 2004
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
9 *
wdenk9d46ea42005-03-14 23:56:42 +000010 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
13 *
wdenk80885a92004-02-26 23:46:20 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk80885a92004-02-26 23:46:20 +000032 */
33/*
34 * IMPORTANT NOTES
35 * 1 - this driver is intended for use with USB Mass Storage Devices
36 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
37 */
38
39#include <common.h>
40
41#ifdef CONFIG_USB_OHCI
42
43#include <malloc.h>
44#include <usb.h>
45#include "usb_ohci.h"
46
47#include <mpc5xxx.h>
48
49#define OHCI_USE_NPS /* force NoPowerSwitching mode */
50#undef OHCI_VERBOSE_DEBUG /* not always helpful */
51#undef DEBUG
52#undef SHOW_INFO
53#undef OHCI_FILL_TRACE
54
55/* For initializing controller (mask in an HCFS mode too) */
56#define OHCI_CONTROL_INIT \
57 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
58
59#define readl(a) (*((vu_long *)(a)))
60#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
61
62#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
63
64#ifdef DEBUG
65#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
66#else
67#define dbg(format, arg...) do {} while(0)
68#endif /* DEBUG */
69#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
70#ifdef SHOW_INFO
71#define info(format, arg...) printf("INFO: " format "\n", ## arg)
72#else
73#define info(format, arg...) do {} while(0)
74#endif
75
76#define m16_swap(x) swap_16(x)
77#define m32_swap(x) swap_32(x)
78
79#ifdef CONFIG_MPC5200
80#define ohci_cpu_to_le16(x) (x)
81#define ohci_cpu_to_le32(x) (x)
82#else
83#define ohci_cpu_to_le16(x) swap_16(x)
84#define ohci_cpu_to_le32(x) swap_32(x)
85#endif
86
87/* global ohci_t */
88static ohci_t gohci;
89/* this must be aligned to a 256 byte boundary */
90struct ohci_hcca ghcca[1];
91/* a pointer to the aligned storage */
92struct ohci_hcca *phcca;
93/* this allocates EDs for all possible endpoints */
94struct ohci_device ohci_dev;
95/* urb_priv */
96urb_priv_t urb_priv;
97/* RHSC flag */
98int got_rhsc;
99/* device which was disconnected */
100struct usb_device *devgone;
101
102/*-------------------------------------------------------------------------*/
103
104/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
105 * The erratum (#4) description is incorrect. AMD's workaround waits
106 * till some bits (mostly reserved) are clear; ok for all revs.
107 */
108#define OHCI_QUIRK_AMD756 0xabcd
109#define read_roothub(hc, register, mask) ({ \
110 u32 temp = readl (&hc->regs->roothub.register); \
111 if (hc->flags & OHCI_QUIRK_AMD756) \
112 while (temp & mask) \
113 temp = readl (&hc->regs->roothub.register); \
114 temp; })
115
116static u32 roothub_a (struct ohci *hc)
117 { return read_roothub (hc, a, 0xfc0fe000); }
118static inline u32 roothub_b (struct ohci *hc)
119 { return readl (&hc->regs->roothub.b); }
120static inline u32 roothub_status (struct ohci *hc)
121 { return readl (&hc->regs->roothub.status); }
122static u32 roothub_portstatus (struct ohci *hc, int i)
123 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
124
125
126/* forward declaration */
127static int hc_interrupt (void);
128static void
129td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
130 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
131
132/*-------------------------------------------------------------------------*
133 * URB support functions
134 *-------------------------------------------------------------------------*/
135
136/* free HCD-private data associated with this URB */
137
138static void urb_free_priv (urb_priv_t * urb)
139{
140 int i;
141 int last;
142 struct td * td;
143
144 last = urb->length - 1;
145 if (last >= 0) {
146 for (i = 0; i <= last; i++) {
147 td = urb->td[i];
148 if (td) {
149 td->usb_dev = NULL;
150 urb->td[i] = NULL;
151 }
152 }
153 }
154}
155
156/*-------------------------------------------------------------------------*/
157
158#ifdef DEBUG
159static int sohci_get_current_frame_number (struct usb_device * dev);
160
161/* debug| print the main components of an URB
162 * small: 0) header + data packets 1) just header */
163
164static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
165 int transfer_len, struct devrequest * setup, char * str, int small)
166{
167 urb_priv_t * purb = &urb_priv;
168
169 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
170 str,
171 sohci_get_current_frame_number (dev),
172 usb_pipedevice (pipe),
173 usb_pipeendpoint (pipe),
174 usb_pipeout (pipe)? 'O': 'I',
175 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
176 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
177 purb->actual_length,
178 transfer_len, dev->status);
179#ifdef OHCI_VERBOSE_DEBUG
180 if (!small) {
181 int i, len;
182
183 if (usb_pipecontrol (pipe)) {
184 printf (__FILE__ ": cmd(8):");
185 for (i = 0; i < 8 ; i++)
186 printf (" %02x", ((__u8 *) setup) [i]);
187 printf ("\n");
188 }
189 if (transfer_len > 0 && buffer) {
190 printf (__FILE__ ": data(%d/%d):",
191 purb->actual_length,
192 transfer_len);
193 len = usb_pipeout (pipe)?
194 transfer_len: purb->actual_length;
195 for (i = 0; i < 16 && i < len; i++)
196 printf (" %02x", ((__u8 *) buffer) [i]);
197 printf ("%s\n", i < len? "...": "");
198 }
199 }
200#endif
201}
202
203/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
204void ep_print_int_eds (ohci_t *ohci, char * str) {
205 int i, j;
206 __u32 * ed_p;
207 for (i= 0; i < 32; i++) {
208 j = 5;
209 ed_p = &(ohci->hcca->int_table [i]);
210 if (*ed_p == 0)
211 continue;
212 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
213 while (*ed_p != 0 && j--) {
214 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
215 printf (" ed: %4x;", ed->hwINFO);
216 ed_p = &ed->hwNextED;
217 }
218 printf ("\n");
219 }
220}
221
222static void ohci_dump_intr_mask (char *label, __u32 mask)
223{
224 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
225 label,
226 mask,
227 (mask & OHCI_INTR_MIE) ? " MIE" : "",
228 (mask & OHCI_INTR_OC) ? " OC" : "",
229 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
230 (mask & OHCI_INTR_FNO) ? " FNO" : "",
231 (mask & OHCI_INTR_UE) ? " UE" : "",
232 (mask & OHCI_INTR_RD) ? " RD" : "",
233 (mask & OHCI_INTR_SF) ? " SF" : "",
234 (mask & OHCI_INTR_WDH) ? " WDH" : "",
235 (mask & OHCI_INTR_SO) ? " SO" : ""
236 );
237}
238
239static void maybe_print_eds (char *label, __u32 value)
240{
241 ed_t *edp = (ed_t *)value;
242
243 if (value) {
244 dbg ("%s %08x", label, value);
245 dbg ("%08x", edp->hwINFO);
246 dbg ("%08x", edp->hwTailP);
247 dbg ("%08x", edp->hwHeadP);
248 dbg ("%08x", edp->hwNextED);
249 }
250}
251
252static char * hcfs2string (int state)
253{
254 switch (state) {
255 case OHCI_USB_RESET: return "reset";
256 case OHCI_USB_RESUME: return "resume";
257 case OHCI_USB_OPER: return "operational";
258 case OHCI_USB_SUSPEND: return "suspend";
259 }
260 return "?";
261}
262
263/* dump control and status registers */
264static void ohci_dump_status (ohci_t *controller)
265{
266 struct ohci_regs *regs = controller->regs;
267 __u32 temp;
268
269 temp = readl (&regs->revision) & 0xff;
270 if (temp != 0x10)
271 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
272
273 temp = readl (&regs->control);
274 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
275 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
276 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
277 (temp & OHCI_CTRL_IR) ? " IR" : "",
278 hcfs2string (temp & OHCI_CTRL_HCFS),
279 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
280 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
281 (temp & OHCI_CTRL_IE) ? " IE" : "",
282 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
283 temp & OHCI_CTRL_CBSR
284 );
285
286 temp = readl (&regs->cmdstatus);
287 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
288 (temp & OHCI_SOC) >> 16,
289 (temp & OHCI_OCR) ? " OCR" : "",
290 (temp & OHCI_BLF) ? " BLF" : "",
291 (temp & OHCI_CLF) ? " CLF" : "",
292 (temp & OHCI_HCR) ? " HCR" : ""
293 );
294
295 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
296 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
297
298 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
299
300 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
301 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
302
303 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
304 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
305
306 maybe_print_eds ("donehead", readl (&regs->donehead));
307}
308
309static void ohci_dump_roothub (ohci_t *controller, int verbose)
310{
311 __u32 temp, ndp, i;
312
313 temp = roothub_a (controller);
314 ndp = (temp & RH_A_NDP);
315
316 if (verbose) {
317 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
318 ((temp & RH_A_POTPGT) >> 24) & 0xff,
319 (temp & RH_A_NOCP) ? " NOCP" : "",
320 (temp & RH_A_OCPM) ? " OCPM" : "",
321 (temp & RH_A_DT) ? " DT" : "",
322 (temp & RH_A_NPS) ? " NPS" : "",
323 (temp & RH_A_PSM) ? " PSM" : "",
324 ndp
325 );
326 temp = roothub_b (controller);
327 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
328 temp,
329 (temp & RH_B_PPCM) >> 16,
330 (temp & RH_B_DR)
331 );
332 temp = roothub_status (controller);
333 dbg ("roothub.status: %08x%s%s%s%s%s%s",
334 temp,
335 (temp & RH_HS_CRWE) ? " CRWE" : "",
336 (temp & RH_HS_OCIC) ? " OCIC" : "",
337 (temp & RH_HS_LPSC) ? " LPSC" : "",
338 (temp & RH_HS_DRWE) ? " DRWE" : "",
339 (temp & RH_HS_OCI) ? " OCI" : "",
340 (temp & RH_HS_LPS) ? " LPS" : ""
341 );
342 }
343
344 for (i = 0; i < ndp; i++) {
345 temp = roothub_portstatus (controller, i);
346 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
347 i,
348 temp,
349 (temp & RH_PS_PRSC) ? " PRSC" : "",
350 (temp & RH_PS_OCIC) ? " OCIC" : "",
351 (temp & RH_PS_PSSC) ? " PSSC" : "",
352 (temp & RH_PS_PESC) ? " PESC" : "",
353 (temp & RH_PS_CSC) ? " CSC" : "",
354
355 (temp & RH_PS_LSDA) ? " LSDA" : "",
356 (temp & RH_PS_PPS) ? " PPS" : "",
357 (temp & RH_PS_PRS) ? " PRS" : "",
358 (temp & RH_PS_POCI) ? " POCI" : "",
359 (temp & RH_PS_PSS) ? " PSS" : "",
360
361 (temp & RH_PS_PES) ? " PES" : "",
362 (temp & RH_PS_CCS) ? " CCS" : ""
363 );
364 }
365}
366
367static void ohci_dump (ohci_t *controller, int verbose)
368{
369 dbg ("OHCI controller usb-%s state", controller->slot_name);
370
371 /* dumps some of the state we know about */
372 ohci_dump_status (controller);
373 if (verbose)
374 ep_print_int_eds (controller, "hcca");
375 dbg ("hcca frame #%04x", controller->hcca->frame_no);
376 ohci_dump_roothub (controller, 1);
377}
378
379
380#endif /* DEBUG */
381
382/*-------------------------------------------------------------------------*
383 * Interface functions (URB)
384 *-------------------------------------------------------------------------*/
385
386/* get a transfer request */
387
388int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
389 int transfer_len, struct devrequest *setup, int interval)
390{
391 ohci_t *ohci;
392 ed_t * ed;
393 urb_priv_t *purb_priv;
394 int i, size = 0;
395
396 ohci = &gohci;
397
398 /* when controller's hung, permit only roothub cleanup attempts
399 * such as powering down ports */
400 if (ohci->disabled) {
401 err("sohci_submit_job: EPIPE");
402 return -1;
403 }
404
405 /* every endpoint has a ed, locate and fill it */
406 if (!(ed = ep_add_ed (dev, pipe))) {
407 err("sohci_submit_job: ENOMEM");
408 return -1;
409 }
410
411 /* for the private part of the URB we need the number of TDs (size) */
412 switch (usb_pipetype (pipe)) {
413 case PIPE_BULK: /* one TD for every 4096 Byte */
414 size = (transfer_len - 1) / 4096 + 1;
415 break;
416 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
417 size = (transfer_len == 0)? 2:
418 (transfer_len - 1) / 4096 + 3;
419 break;
420 }
421
422 if (size >= (N_URB_TD - 1)) {
423 err("need %d TDs, only have %d", size, N_URB_TD);
424 return -1;
425 }
426 purb_priv = &urb_priv;
427 purb_priv->pipe = pipe;
428
429 /* fill the private part of the URB */
430 purb_priv->length = size;
431 purb_priv->ed = ed;
432 purb_priv->actual_length = 0;
433
434 /* allocate the TDs */
435 /* note that td[0] was allocated in ep_add_ed */
436 for (i = 0; i < size; i++) {
437 purb_priv->td[i] = td_alloc (dev);
438 if (!purb_priv->td[i]) {
439 purb_priv->length = i;
440 urb_free_priv (purb_priv);
441 err("sohci_submit_job: ENOMEM");
442 return -1;
443 }
444 }
445
446 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
447 urb_free_priv (purb_priv);
448 err("sohci_submit_job: EINVAL");
449 return -1;
450 }
451
452 /* link the ed into a chain if is not already */
453 if (ed->state != ED_OPER)
454 ep_link (ohci, ed);
455
456 /* fill the TDs and link it to the ed */
457 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
458
459 return 0;
460}
461
462/*-------------------------------------------------------------------------*/
463
464#ifdef DEBUG
465/* tell us the current USB frame number */
466
467static int sohci_get_current_frame_number (struct usb_device *usb_dev)
468{
469 ohci_t *ohci = &gohci;
470
471 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
472}
473#endif
474
475/*-------------------------------------------------------------------------*
476 * ED handling functions
477 *-------------------------------------------------------------------------*/
478
479/* link an ed into one of the HC chains */
480
481static int ep_link (ohci_t *ohci, ed_t *edi)
482{
483 volatile ed_t *ed = edi;
484
485 ed->state = ED_OPER;
486
487 switch (ed->type) {
488 case PIPE_CONTROL:
489 ed->hwNextED = 0;
490 if (ohci->ed_controltail == NULL) {
491 writel (ed, &ohci->regs->ed_controlhead);
492 } else {
wdenk79d696f2004-03-11 22:46:36 +0000493 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
wdenk80885a92004-02-26 23:46:20 +0000494 }
495 ed->ed_prev = ohci->ed_controltail;
496 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
497 !ohci->ed_rm_list[1] && !ohci->sleeping) {
498 ohci->hc_control |= OHCI_CTRL_CLE;
499 writel (ohci->hc_control, &ohci->regs->control);
500 }
501 ohci->ed_controltail = edi;
502 break;
503
504 case PIPE_BULK:
505 ed->hwNextED = 0;
506 if (ohci->ed_bulktail == NULL) {
507 writel (ed, &ohci->regs->ed_bulkhead);
508 } else {
wdenk79d696f2004-03-11 22:46:36 +0000509 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
wdenk80885a92004-02-26 23:46:20 +0000510 }
511 ed->ed_prev = ohci->ed_bulktail;
512 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
513 !ohci->ed_rm_list[1] && !ohci->sleeping) {
514 ohci->hc_control |= OHCI_CTRL_BLE;
515 writel (ohci->hc_control, &ohci->regs->control);
516 }
517 ohci->ed_bulktail = edi;
518 break;
519 }
520 return 0;
521}
522
523/*-------------------------------------------------------------------------*/
524
525/* unlink an ed from one of the HC chains.
526 * just the link to the ed is unlinked.
527 * the link from the ed still points to another operational ed or 0
528 * so the HC can eventually finish the processing of the unlinked ed */
529
530static int ep_unlink (ohci_t *ohci, ed_t *edi)
531{
532 volatile ed_t *ed = edi;
533
534 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
535
536 switch (ed->type) {
537 case PIPE_CONTROL:
538 if (ed->ed_prev == NULL) {
539 if (!ed->hwNextED) {
540 ohci->hc_control &= ~OHCI_CTRL_CLE;
541 writel (ohci->hc_control, &ohci->regs->control);
542 }
543 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
544 } else {
545 ed->ed_prev->hwNextED = ed->hwNextED;
546 }
547 if (ohci->ed_controltail == ed) {
548 ohci->ed_controltail = ed->ed_prev;
549 } else {
550 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
551 }
552 break;
553
554 case PIPE_BULK:
555 if (ed->ed_prev == NULL) {
556 if (!ed->hwNextED) {
557 ohci->hc_control &= ~OHCI_CTRL_BLE;
558 writel (ohci->hc_control, &ohci->regs->control);
559 }
560 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
561 } else {
562 ed->ed_prev->hwNextED = ed->hwNextED;
563 }
564 if (ohci->ed_bulktail == ed) {
565 ohci->ed_bulktail = ed->ed_prev;
566 } else {
567 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
568 }
569 break;
570 }
571 ed->state = ED_UNLINK;
572 return 0;
573}
574
575
576/*-------------------------------------------------------------------------*/
577
578/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
579 * but the USB stack is a little bit stateless so we do it at every transaction
580 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
581 * in all other cases the state is left unchanged
582 * the ed info fields are setted anyway even though most of them should not change */
583
584static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
585{
586 td_t *td;
587 ed_t *ed_ret;
588 volatile ed_t *ed;
589
590 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
591 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
592
593 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
594 err("ep_add_ed: pending delete");
595 /* pending delete request */
596 return NULL;
597 }
598
599 if (ed->state == ED_NEW) {
600 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
601 /* dummy td; end of td list for ed */
602 td = td_alloc (usb_dev);
wdenk79d696f2004-03-11 22:46:36 +0000603 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
wdenk80885a92004-02-26 23:46:20 +0000604 ed->hwHeadP = ed->hwTailP;
605 ed->state = ED_UNLINK;
606 ed->type = usb_pipetype (pipe);
607 ohci_dev.ed_cnt++;
608 }
609
610 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
611 | usb_pipeendpoint (pipe) << 7
612 | (usb_pipeisoc (pipe)? 0x8000: 0)
613 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
614 | usb_pipeslow (pipe) << 13
615 | usb_maxpacket (usb_dev, pipe) << 16);
616
617 return ed_ret;
618}
619
620/*-------------------------------------------------------------------------*
621 * TD handling functions
622 *-------------------------------------------------------------------------*/
623
624/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
625
626static void td_fill (ohci_t *ohci, unsigned int info,
627 void *data, int len,
628 struct usb_device *dev, int index, urb_priv_t *urb_priv)
629{
630 volatile td_t *td, *td_pt;
631#ifdef OHCI_FILL_TRACE
632 int i;
633#endif
634
635 if (index > urb_priv->length) {
636 err("index > length");
637 return;
638 }
639 /* use this td as the next dummy */
640 td_pt = urb_priv->td [index];
641 td_pt->hwNextTD = 0;
642
643 /* fill the old dummy TD */
644 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
645
646 td->ed = urb_priv->ed;
647 td->next_dl_td = NULL;
648 td->index = index;
649 td->data = (__u32)data;
650#ifdef OHCI_FILL_TRACE
651 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
652 for (i = 0; i < len; i++)
653 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
654 printf("\n");
655 }
656#endif
657 if (!len)
658 data = 0;
659
660 td->hwINFO = ohci_cpu_to_le32 (info);
wdenk79d696f2004-03-11 22:46:36 +0000661 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
wdenk80885a92004-02-26 23:46:20 +0000662 if (data)
wdenk79d696f2004-03-11 22:46:36 +0000663 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
wdenk80885a92004-02-26 23:46:20 +0000664 else
665 td->hwBE = 0;
wdenk79d696f2004-03-11 22:46:36 +0000666 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
wdenk80885a92004-02-26 23:46:20 +0000667 td->hwPSW [0] = ohci_cpu_to_le16 (((__u32)data & 0x0FFF) | 0xE000);
668
669 /* append to queue */
670 td->ed->hwTailP = td->hwNextTD;
671}
672
673/*-------------------------------------------------------------------------*/
674
675/* prepare all TDs of a transfer */
676
677static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
678 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
679{
680 ohci_t *ohci = &gohci;
681 int data_len = transfer_len;
682 void *data;
683 int cnt = 0;
684 __u32 info = 0;
685 unsigned int toggle = 0;
686
687 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
688 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
689 toggle = TD_T_TOGGLE;
690 } else {
691 toggle = TD_T_DATA0;
692 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
693 }
694 urb->td_cnt = 0;
695 if (data_len)
696 data = buffer;
697 else
698 data = 0;
699
700 switch (usb_pipetype (pipe)) {
701 case PIPE_BULK:
702 info = usb_pipeout (pipe)?
703 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
704 while(data_len > 4096) {
705 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
706 data += 4096; data_len -= 4096; cnt++;
707 }
708 info = usb_pipeout (pipe)?
709 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
710 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
711 cnt++;
712
713 if (!ohci->sleeping)
714 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
715 break;
716
717 case PIPE_CONTROL:
718 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
719 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
720 if (data_len > 0) {
721 info = usb_pipeout (pipe)?
722 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
723 /* NOTE: mishandles transfers >8K, some >4K */
724 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
725 }
726 info = usb_pipeout (pipe)?
727 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
728 td_fill (ohci, info, data, 0, dev, cnt++, urb);
729 if (!ohci->sleeping)
730 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
731 break;
732 }
733 if (urb->length != cnt)
734 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
735}
736
737/*-------------------------------------------------------------------------*
738 * Done List handling functions
739 *-------------------------------------------------------------------------*/
740
741
742/* calculate the transfer length and update the urb */
743
744static void dl_transfer_length(td_t * td)
745{
746 __u32 tdINFO, tdBE, tdCBP;
747 urb_priv_t *lurb_priv = &urb_priv;
748
749 tdINFO = ohci_cpu_to_le32 (td->hwINFO);
750 tdBE = ohci_cpu_to_le32 (td->hwBE);
751 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
752
753
754 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
755 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
756 if (tdBE != 0) {
757 if (td->hwCBP == 0)
758 lurb_priv->actual_length += tdBE - td->data + 1;
759 else
760 lurb_priv->actual_length += tdCBP - td->data;
761 }
762 }
763}
764
765/*-------------------------------------------------------------------------*/
766
767/* replies to the request have to be on a FIFO basis so
768 * we reverse the reversed done-list */
769
770static td_t * dl_reverse_done_list (ohci_t *ohci)
771{
772 __u32 td_list_hc;
773 td_t *td_rev = NULL;
774 td_t *td_list = NULL;
775 urb_priv_t *lurb_priv = NULL;
776
777 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
778 ohci->hcca->done_head = 0;
779
780 while (td_list_hc) {
781 td_list = (td_t *)td_list_hc;
782
783 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
784 lurb_priv = &urb_priv;
785 dbg(" USB-error/status: %x : %p",
786 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
787 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
788 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
789 td_list->ed->hwHeadP =
790 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
791 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
792 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
793 } else
794 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
795 }
796#ifdef CONFIG_MPC5200
797 td_list->hwNextTD = 0;
798#endif
799 }
800
801 td_list->next_dl_td = td_rev;
802 td_rev = td_list;
803 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
804 }
805 return td_list;
806}
807
808/*-------------------------------------------------------------------------*/
809
810/* td done list */
811static int dl_done_list (ohci_t *ohci, td_t *td_list)
812{
813 td_t *td_list_next = NULL;
814 ed_t *ed;
815 int cc = 0;
816 int stat = 0xff;
817 /* urb_t *urb; */
818 urb_priv_t *lurb_priv;
819 __u32 tdINFO, edHeadP, edTailP;
820
821 while (td_list) {
822 td_list_next = td_list->next_dl_td;
823
824 lurb_priv = &urb_priv;
825 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
826
827 ed = td_list->ed;
828
829 dl_transfer_length(td_list);
830
831 /* error code of transfer */
832 cc = TD_CC_GET (tdINFO);
833 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
834 if ((ed->state & (ED_OPER | ED_UNLINK))
835 && (lurb_priv->state != URB_DEL)) {
836 dbg("ConditionCode %#x", cc);
837 stat = cc_to_error[cc];
838 }
839 }
840
841 if (ed->state != ED_NEW) {
842 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
843 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
844
845 /* unlink eds if they are not busy */
846 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
847 ep_unlink (ohci, ed);
848 }
849
850 td_list = td_list_next;
851 }
852 return stat;
853}
854
855/*-------------------------------------------------------------------------*
856 * Virtual Root Hub
857 *-------------------------------------------------------------------------*/
858
859/* Device descriptor */
860static __u8 root_hub_dev_des[] =
861{
862 0x12, /* __u8 bLength; */
863 0x01, /* __u8 bDescriptorType; Device */
864 0x10, /* __u16 bcdUSB; v1.1 */
865 0x01,
866 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
867 0x00, /* __u8 bDeviceSubClass; */
868 0x00, /* __u8 bDeviceProtocol; */
869 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
870 0x00, /* __u16 idVendor; */
871 0x00,
872 0x00, /* __u16 idProduct; */
873 0x00,
874 0x00, /* __u16 bcdDevice; */
875 0x00,
876 0x00, /* __u8 iManufacturer; */
877 0x01, /* __u8 iProduct; */
878 0x00, /* __u8 iSerialNumber; */
879 0x01 /* __u8 bNumConfigurations; */
880};
881
882
883/* Configuration descriptor */
884static __u8 root_hub_config_des[] =
885{
886 0x09, /* __u8 bLength; */
887 0x02, /* __u8 bDescriptorType; Configuration */
888 0x19, /* __u16 wTotalLength; */
889 0x00,
890 0x01, /* __u8 bNumInterfaces; */
891 0x01, /* __u8 bConfigurationValue; */
892 0x00, /* __u8 iConfiguration; */
893 0x40, /* __u8 bmAttributes;
894 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
895 0x00, /* __u8 MaxPower; */
896
897 /* interface */
898 0x09, /* __u8 if_bLength; */
899 0x04, /* __u8 if_bDescriptorType; Interface */
900 0x00, /* __u8 if_bInterfaceNumber; */
901 0x00, /* __u8 if_bAlternateSetting; */
902 0x01, /* __u8 if_bNumEndpoints; */
903 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
904 0x00, /* __u8 if_bInterfaceSubClass; */
905 0x00, /* __u8 if_bInterfaceProtocol; */
906 0x00, /* __u8 if_iInterface; */
907
908 /* endpoint */
909 0x07, /* __u8 ep_bLength; */
910 0x05, /* __u8 ep_bDescriptorType; Endpoint */
911 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
912 0x03, /* __u8 ep_bmAttributes; Interrupt */
913 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
914 0x00,
915 0xff /* __u8 ep_bInterval; 255 ms */
916};
917
918static unsigned char root_hub_str_index0[] =
919{
920 0x04, /* __u8 bLength; */
921 0x03, /* __u8 bDescriptorType; String-descriptor */
922 0x09, /* __u8 lang ID */
923 0x04, /* __u8 lang ID */
924};
925
926static unsigned char root_hub_str_index1[] =
927{
928 28, /* __u8 bLength; */
929 0x03, /* __u8 bDescriptorType; String-descriptor */
930 'O', /* __u8 Unicode */
931 0, /* __u8 Unicode */
932 'H', /* __u8 Unicode */
933 0, /* __u8 Unicode */
934 'C', /* __u8 Unicode */
935 0, /* __u8 Unicode */
936 'I', /* __u8 Unicode */
937 0, /* __u8 Unicode */
938 ' ', /* __u8 Unicode */
939 0, /* __u8 Unicode */
940 'R', /* __u8 Unicode */
941 0, /* __u8 Unicode */
942 'o', /* __u8 Unicode */
943 0, /* __u8 Unicode */
944 'o', /* __u8 Unicode */
945 0, /* __u8 Unicode */
946 't', /* __u8 Unicode */
947 0, /* __u8 Unicode */
948 ' ', /* __u8 Unicode */
949 0, /* __u8 Unicode */
950 'H', /* __u8 Unicode */
951 0, /* __u8 Unicode */
952 'u', /* __u8 Unicode */
953 0, /* __u8 Unicode */
954 'b', /* __u8 Unicode */
955 0, /* __u8 Unicode */
956};
957
958/* Hub class-specific descriptor is constructed dynamically */
959
960
961/*-------------------------------------------------------------------------*/
962
963#define OK(x) len = (x); break
964#ifdef DEBUG
965#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
966#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
967#else
968#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
969#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
970#endif
971#define RD_RH_STAT roothub_status(&gohci)
972#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
973
974/* request to virtual root hub */
975
976int rh_check_port_status(ohci_t *controller)
977{
978 __u32 temp, ndp, i;
979 int res;
980
981 res = -1;
982 temp = roothub_a (controller);
983 ndp = (temp & RH_A_NDP);
984 for (i = 0; i < ndp; i++) {
985 temp = roothub_portstatus (controller, i);
986 /* check for a device disconnect */
987 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
988 (RH_PS_PESC | RH_PS_CSC)) &&
989 ((temp & RH_PS_CCS) == 0)) {
990 res = i;
991 break;
992 }
993 }
994 return res;
995}
996
997static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
998 void *buffer, int transfer_len, struct devrequest *cmd)
999{
1000 void * data = buffer;
1001 int leni = transfer_len;
1002 int len = 0;
1003 int stat = 0;
1004 __u32 datab[4];
1005 __u8 *data_buf = (__u8 *)datab;
1006 __u16 bmRType_bReq;
1007 __u16 wValue;
1008 __u16 wIndex;
1009 __u16 wLength;
1010
1011#ifdef DEBUG
1012urb_priv.actual_length = 0;
1013pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1014#endif
1015 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1016 info("Root-Hub submit IRQ: NOT implemented");
1017 return 0;
1018 }
1019
1020 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1021 wValue = m16_swap (cmd->value);
1022 wIndex = m16_swap (cmd->index);
1023 wLength = m16_swap (cmd->length);
1024
1025 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1026 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1027
1028 switch (bmRType_bReq) {
1029 /* Request Destination:
1030 without flags: Device,
1031 RH_INTERFACE: interface,
1032 RH_ENDPOINT: endpoint,
1033 RH_CLASS means HUB here,
1034 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1035 */
1036
1037 case RH_GET_STATUS:
1038 *(__u16 *) data_buf = m16_swap (1); OK (2);
1039 case RH_GET_STATUS | RH_INTERFACE:
1040 *(__u16 *) data_buf = m16_swap (0); OK (2);
1041 case RH_GET_STATUS | RH_ENDPOINT:
1042 *(__u16 *) data_buf = m16_swap (0); OK (2);
1043 case RH_GET_STATUS | RH_CLASS:
1044 *(__u32 *) data_buf = m32_swap (
1045 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1046 OK (4);
1047 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1048 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1049
1050 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1051 switch (wValue) {
1052 case (RH_ENDPOINT_STALL): OK (0);
1053 }
1054 break;
1055
1056 case RH_CLEAR_FEATURE | RH_CLASS:
1057 switch (wValue) {
1058 case RH_C_HUB_LOCAL_POWER:
1059 OK(0);
1060 case (RH_C_HUB_OVER_CURRENT):
1061 WR_RH_STAT(RH_HS_OCIC); OK (0);
1062 }
1063 break;
1064
1065 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1066 switch (wValue) {
1067 case (RH_PORT_ENABLE):
1068 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1069 case (RH_PORT_SUSPEND):
1070 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1071 case (RH_PORT_POWER):
1072 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1073 case (RH_C_PORT_CONNECTION):
1074 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1075 case (RH_C_PORT_ENABLE):
1076 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1077 case (RH_C_PORT_SUSPEND):
1078 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1079 case (RH_C_PORT_OVER_CURRENT):
1080 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1081 case (RH_C_PORT_RESET):
1082 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1083 }
1084 break;
1085
1086 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1087 switch (wValue) {
1088 case (RH_PORT_SUSPEND):
1089 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1090 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1091 if (RD_RH_PORTSTAT & RH_PS_CCS)
1092 WR_RH_PORTSTAT (RH_PS_PRS);
1093 OK (0);
1094 case (RH_PORT_POWER):
1095 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1096 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1097 if (RD_RH_PORTSTAT & RH_PS_CCS)
1098 WR_RH_PORTSTAT (RH_PS_PES );
1099 OK (0);
1100 }
1101 break;
1102
1103 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1104
1105 case RH_GET_DESCRIPTOR:
1106 switch ((wValue & 0xff00) >> 8) {
1107 case (0x01): /* device descriptor */
1108 len = min_t(unsigned int,
1109 leni,
1110 min_t(unsigned int,
1111 sizeof (root_hub_dev_des),
1112 wLength));
1113 data_buf = root_hub_dev_des; OK(len);
1114 case (0x02): /* configuration descriptor */
1115 len = min_t(unsigned int,
1116 leni,
1117 min_t(unsigned int,
1118 sizeof (root_hub_config_des),
1119 wLength));
1120 data_buf = root_hub_config_des; OK(len);
1121 case (0x03): /* string descriptors */
1122 if(wValue==0x0300) {
1123 len = min_t(unsigned int,
1124 leni,
1125 min_t(unsigned int,
1126 sizeof (root_hub_str_index0),
1127 wLength));
1128 data_buf = root_hub_str_index0;
1129 OK(len);
1130 }
1131 if(wValue==0x0301) {
1132 len = min_t(unsigned int,
1133 leni,
1134 min_t(unsigned int,
1135 sizeof (root_hub_str_index1),
1136 wLength));
1137 data_buf = root_hub_str_index1;
1138 OK(len);
1139 }
1140 default:
1141 stat = USB_ST_STALLED;
1142 }
1143 break;
1144
1145 case RH_GET_DESCRIPTOR | RH_CLASS:
1146 {
1147 __u32 temp = roothub_a (&gohci);
1148
1149 data_buf [0] = 9; /* min length; */
1150 data_buf [1] = 0x29;
1151 data_buf [2] = temp & RH_A_NDP;
1152 data_buf [3] = 0;
1153 if (temp & RH_A_PSM) /* per-port power switching? */
1154 data_buf [3] |= 0x1;
1155 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1156 data_buf [3] |= 0x10;
1157 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1158 data_buf [3] |= 0x8;
1159
1160 /* corresponds to data_buf[4-7] */
1161 datab [1] = 0;
1162 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1163 temp = roothub_b (&gohci);
1164 data_buf [7] = temp & RH_B_DR;
1165 if (data_buf [2] < 7) {
1166 data_buf [8] = 0xff;
1167 } else {
1168 data_buf [0] += 2;
1169 data_buf [8] = (temp & RH_B_DR) >> 8;
1170 data_buf [10] = data_buf [9] = 0xff;
1171 }
1172
1173 len = min_t(unsigned int, leni,
1174 min_t(unsigned int, data_buf [0], wLength));
1175 OK (len);
1176 }
1177
1178 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1179
1180 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1181
1182 default:
1183 dbg ("unsupported root hub command");
1184 stat = USB_ST_STALLED;
1185 }
1186
1187#ifdef DEBUG
1188 ohci_dump_roothub (&gohci, 1);
1189#endif
1190
1191 len = min_t(int, len, leni);
1192 if (data != data_buf)
1193 memcpy (data, data_buf, len);
1194 dev->act_len = len;
1195 dev->status = stat;
1196
1197#ifdef DEBUG
1198 if (transfer_len)
1199 urb_priv.actual_length = transfer_len;
1200 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1201#endif
1202
1203 return stat;
1204}
1205
1206/*-------------------------------------------------------------------------*/
1207
1208/* common code for handling submit messages - used for all but root hub */
1209/* accesses. */
1210int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1211 int transfer_len, struct devrequest *setup, int interval)
1212{
1213 int stat = 0;
1214 int maxsize = usb_maxpacket(dev, pipe);
1215 int timeout;
1216
1217 /* device pulled? Shortcut the action. */
1218 if (devgone == dev) {
1219 dev->status = USB_ST_CRC_ERR;
1220 return 0;
1221 }
1222
1223#ifdef DEBUG
1224 urb_priv.actual_length = 0;
1225 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1226#endif
1227 if (!maxsize) {
1228 err("submit_common_message: pipesize for pipe %lx is zero",
1229 pipe);
1230 return -1;
1231 }
1232
1233 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1234 err("sohci_submit_job failed");
1235 return -1;
1236 }
1237
1238 /* allow more time for a BULK device to react - some are slow */
1239#define BULK_TO 5000 /* timeout in milliseconds */
1240 if (usb_pipetype (pipe) == PIPE_BULK)
1241 timeout = BULK_TO;
1242 else
1243 timeout = 100;
1244
1245 /* wait for it to complete */
1246 for (;;) {
1247 /* check whether the controller is done */
1248 stat = hc_interrupt();
1249 if (stat < 0) {
1250 stat = USB_ST_CRC_ERR;
1251 break;
1252 }
1253 if (stat >= 0 && stat < 0xff) {
1254 /* 0xff is returned for an SF-interrupt */
1255 break;
1256 }
1257 if (--timeout) {
1258 wait_ms(1);
1259 } else {
1260 err("CTL:TIMEOUT ");
1261 stat = USB_ST_CRC_ERR;
1262 break;
1263 }
1264 }
1265 /* we got an Root Hub Status Change interrupt */
1266 if (got_rhsc) {
1267#ifdef DEBUG
1268 ohci_dump_roothub (&gohci, 1);
1269#endif
1270 got_rhsc = 0;
1271 /* abuse timeout */
1272 timeout = rh_check_port_status(&gohci);
1273 if (timeout >= 0) {
1274#if 0 /* this does nothing useful, but leave it here in case that changes */
1275 /* the called routine adds 1 to the passed value */
1276 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1277#endif
1278 /*
1279 * XXX
1280 * This is potentially dangerous because it assumes
1281 * that only one device is ever plugged in!
1282 */
1283 devgone = dev;
1284 }
1285 }
1286
1287 dev->status = stat;
1288 dev->act_len = transfer_len;
1289
1290#ifdef DEBUG
1291 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1292#endif
1293
1294 /* free TDs in urb_priv */
1295 urb_free_priv (&urb_priv);
1296 return 0;
1297}
1298
1299/* submit routines called from usb.c */
1300int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1301 int transfer_len)
1302{
1303 info("submit_bulk_msg");
1304 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1305}
1306
1307int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1308 int transfer_len, struct devrequest *setup)
1309{
1310 int maxsize = usb_maxpacket(dev, pipe);
1311
1312 info("submit_control_msg");
1313#ifdef DEBUG
1314 urb_priv.actual_length = 0;
1315 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1316#endif
1317 if (!maxsize) {
1318 err("submit_control_message: pipesize for pipe %lx is zero",
1319 pipe);
1320 return -1;
1321 }
1322 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1323 gohci.rh.dev = dev;
1324 /* root hub - redirect */
1325 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1326 setup);
1327 }
1328
1329 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1330}
1331
1332int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1333 int transfer_len, int interval)
1334{
1335 info("submit_int_msg");
1336 return -1;
1337}
1338
1339/*-------------------------------------------------------------------------*
1340 * HC functions
1341 *-------------------------------------------------------------------------*/
1342
1343/* reset the HC and BUS */
1344
1345static int hc_reset (ohci_t *ohci)
1346{
1347 int timeout = 30;
1348 int smm_timeout = 50; /* 0,5 sec */
1349
1350 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1351 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1352 info("USB HC TakeOver from SMM");
1353 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1354 wait_ms (10);
1355 if (--smm_timeout == 0) {
1356 err("USB HC TakeOver failed!");
1357 return -1;
1358 }
1359 }
1360 }
1361
1362 /* Disable HC interrupts */
1363 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1364
1365 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1366 ohci->slot_name,
1367 readl (&ohci->regs->control));
1368
1369 /* Reset USB (needed by some controllers) */
1370 ohci->hc_control = 0;
1371 writel (ohci->hc_control, &ohci->regs->control);
1372
1373 /* HC Reset requires max 10 us delay */
1374 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1375 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1376 if (--timeout == 0) {
1377 err("USB HC reset timed out!");
1378 return -1;
1379 }
1380 udelay (1);
1381 }
1382 return 0;
1383}
1384
1385/*-------------------------------------------------------------------------*/
1386
1387/* Start an OHCI controller, set the BUS operational
1388 * enable interrupts
1389 * connect the virtual root hub */
1390
1391static int hc_start (ohci_t * ohci)
1392{
1393 __u32 mask;
1394 unsigned int fminterval;
1395
1396 ohci->disabled = 1;
1397
1398 /* Tell the controller where the control and bulk lists are
1399 * The lists are empty now. */
1400
1401 writel (0, &ohci->regs->ed_controlhead);
1402 writel (0, &ohci->regs->ed_bulkhead);
1403
1404 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1405
1406 fminterval = 0x2edf;
1407 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1408 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1409 writel (fminterval, &ohci->regs->fminterval);
1410 writel (0x628, &ohci->regs->lsthresh);
1411
1412 /* start controller operations */
1413 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1414 ohci->disabled = 0;
1415 writel (ohci->hc_control, &ohci->regs->control);
1416
1417 /* disable all interrupts */
1418 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1419 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1420 OHCI_INTR_OC | OHCI_INTR_MIE);
1421 writel (mask, &ohci->regs->intrdisable);
1422 /* clear all interrupts */
1423 mask &= ~OHCI_INTR_MIE;
1424 writel (mask, &ohci->regs->intrstatus);
1425 /* Choose the interrupts we care about now - but w/o MIE */
1426 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1427 writel (mask, &ohci->regs->intrenable);
1428
1429#ifdef OHCI_USE_NPS
1430 /* required for AMD-756 and some Mac platforms */
1431 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1432 &ohci->regs->roothub.a);
1433 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1434#endif /* OHCI_USE_NPS */
1435
1436#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1437 /* POTPGT delay is bits 24-31, in 2 ms units. */
1438 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1439
1440 /* connect the virtual root hub */
1441 ohci->rh.devnum = 0;
1442
1443 return 0;
1444}
1445
1446/*-------------------------------------------------------------------------*/
1447
1448/* an interrupt happens */
1449
1450static int
1451hc_interrupt (void)
1452{
1453 ohci_t *ohci = &gohci;
1454 struct ohci_regs *regs = ohci->regs;
1455 int ints;
1456 int stat = -1;
1457
1458 if ((ohci->hcca->done_head != 0) && !(ohci_cpu_to_le32 (ohci->hcca->done_head) & 0x01)) {
1459 ints = OHCI_INTR_WDH;
1460 } else {
1461 ints = readl (&regs->intrstatus);
1462 }
1463
1464 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1465
1466 if (ints & OHCI_INTR_RHSC) {
1467 got_rhsc = 1;
1468 }
1469
1470 if (ints & OHCI_INTR_UE) {
1471 ohci->disabled++;
1472 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1473 ohci->slot_name);
1474 /* e.g. due to PCI Master/Target Abort */
1475
1476#ifdef DEBUG
1477 ohci_dump (ohci, 1);
1478#endif
1479 /* FIXME: be optimistic, hope that bug won't repeat often. */
1480 /* Make some non-interrupt context restart the controller. */
1481 /* Count and limit the retries though; either hardware or */
1482 /* software errors can go forever... */
1483 hc_reset (ohci);
1484 return -1;
1485 }
1486
1487 if (ints & OHCI_INTR_WDH) {
1488 writel (OHCI_INTR_WDH, &regs->intrdisable);
1489 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1490 writel (OHCI_INTR_WDH, &regs->intrenable);
1491 }
1492
1493 if (ints & OHCI_INTR_SO) {
1494 dbg("USB Schedule overrun\n");
1495 writel (OHCI_INTR_SO, &regs->intrenable);
1496 stat = -1;
1497 }
1498
1499 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1500 if (ints & OHCI_INTR_SF) {
1501 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
1502 writel (OHCI_INTR_SF, &regs->intrdisable);
1503 if (ohci->ed_rm_list[frame] != NULL)
1504 writel (OHCI_INTR_SF, &regs->intrenable);
1505 stat = 0xff;
1506 }
1507
1508 writel (ints, &regs->intrstatus);
1509 return stat;
1510}
1511
1512/*-------------------------------------------------------------------------*/
1513
1514/*-------------------------------------------------------------------------*/
1515
1516/* De-allocate all resources.. */
1517
1518static void hc_release_ohci (ohci_t *ohci)
1519{
1520 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1521
1522 if (!ohci->disabled)
1523 hc_reset (ohci);
1524}
1525
1526/*-------------------------------------------------------------------------*/
1527
1528/*
1529 * low level initalisation routine, called from usb.c
1530 */
1531static char ohci_inited = 0;
1532
1533int usb_lowlevel_init(void)
1534{
1535
1536 /* Set the USB Clock */
wdenk4d13cba2004-03-14 14:09:05 +00001537 *(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
wdenkc3f9d492004-03-14 00:59:59 +00001538
1539 /* remove all USB bits first before ORing in ours */
1540 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
wdenk4d13cba2004-03-14 14:09:05 +00001541
wdenk80885a92004-02-26 23:46:20 +00001542 /* Activate USB port */
wdenk4d13cba2004-03-14 14:09:05 +00001543 *(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
wdenk80885a92004-02-26 23:46:20 +00001544
1545 memset (&gohci, 0, sizeof (ohci_t));
1546 memset (&urb_priv, 0, sizeof (urb_priv_t));
1547
1548 /* align the storage */
1549 if ((__u32)&ghcca[0] & 0xff) {
1550 err("HCCA not aligned!!");
1551 return -1;
1552 }
1553 phcca = &ghcca[0];
1554 info("aligned ghcca %p", phcca);
1555 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1556 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1557 err("EDs not aligned!!");
1558 return -1;
1559 }
1560 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1561 if ((__u32)gtd & 0x7) {
1562 err("TDs not aligned!!");
1563 return -1;
1564 }
1565 ptd = gtd;
1566 gohci.hcca = phcca;
1567 memset (phcca, 0, sizeof (struct ohci_hcca));
1568
1569 gohci.disabled = 1;
1570 gohci.sleeping = 0;
1571 gohci.irq = -1;
1572 gohci.regs = (struct ohci_regs *)MPC5XXX_USB;
1573
1574 gohci.flags = 0;
1575 gohci.slot_name = "mpc5200";
1576
1577 if (hc_reset (&gohci) < 0) {
1578 hc_release_ohci (&gohci);
1579 return -1;
1580 }
1581
1582 if (hc_start (&gohci) < 0) {
1583 err ("can't start usb-%s", gohci.slot_name);
1584 hc_release_ohci (&gohci);
1585 return -1;
1586 }
1587
1588#ifdef DEBUG
1589 ohci_dump (&gohci, 1);
1590#endif
1591 ohci_inited = 1;
1592 return 0;
1593}
1594
1595int usb_lowlevel_stop(void)
1596{
1597 /* this gets called really early - before the controller has */
1598 /* even been initialized! */
1599 if (!ohci_inited)
1600 return 0;
1601 /* TODO release any interrupts, etc. */
1602 /* call hc_release_ohci() here ? */
1603 hc_reset (&gohci);
1604 return 0;
1605}
1606
1607#endif /* CONFIG_USB_OHCI */