Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2017 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_RK3308_COMMON_H |
| 7 | #define __CONFIG_RK3308_COMMON_H |
| 8 | |
| 9 | #include "rockchip-common.h" |
| 10 | |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 11 | #define CONFIG_SYS_NS16550_MEM32 |
| 12 | |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 13 | #define CONFIG_IRAM_BASE 0xfff80000 |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 14 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ |
| 15 | |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 16 | |
| 17 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ |
| 18 | |
| 19 | #define CONFIG_SYS_SDRAM_BASE 0 |
| 20 | #define SDRAM_MAX_SIZE 0xff000000 |
| 21 | #define SDRAM_BANK_SIZE (2UL << 30) |
| 22 | |
| 23 | #ifndef CONFIG_SPL_BUILD |
| 24 | |
| 25 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 26 | "scriptaddr=0x00500000\0" \ |
| 27 | "pxefile_addr_r=0x00600000\0" \ |
Andy Yan | 0abe0af | 2019-12-26 15:20:04 +0800 | [diff] [blame] | 28 | "fdt_addr_r=0x02800000\0" \ |
Andy Yan | f1a2252 | 2019-11-14 11:21:12 +0800 | [diff] [blame] | 29 | "kernel_addr_r=0x00680000\0" \ |
| 30 | "ramdisk_addr_r=0x04000000\0" |
| 31 | |
| 32 | #include <config_distro_bootcmd.h> |
| 33 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 34 | ENV_MEM_LAYOUT_SETTINGS \ |
| 35 | "partitions=" PARTS_DEFAULT \ |
| 36 | ROCKCHIP_DEVICE_SETTINGS \ |
| 37 | BOOTENV |
| 38 | |
| 39 | #endif |
| 40 | |
| 41 | #endif |