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Masahiro Yamadadd840582014-07-30 14:08:14 +09001menu "MIPS architecture"
2 depends on MIPS
3
4config SYS_ARCH
Masahiro Yamadadd840582014-07-30 14:08:14 +09005 default "mips"
6
Daniel Schwierzeckb9863b62014-10-26 14:14:07 +01007config SYS_CPU
8 default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2
9 default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2
10
Masahiro Yamada7bfd5ee2014-10-24 01:30:46 +090011config USE_PRIVATE_LIBGCC
12 default y
13
Masahiro Yamadadd840582014-07-30 14:08:14 +090014choice
15 prompt "Target select"
Joe Hershbergera26cd042015-05-12 14:46:23 -050016 optional
Masahiro Yamadadd840582014-07-30 14:08:14 +090017
18config TARGET_QEMU_MIPS
19 bool "Support qemu-mips"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +010020 select SUPPORTS_BIG_ENDIAN
21 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +010022 select SUPPORTS_CPU_MIPS32_R1
23 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeckaa45f752014-10-26 14:14:07 +010024 select SUPPORTS_CPU_MIPS64_R1
25 select SUPPORTS_CPU_MIPS64_R2
Masahiro Yamadadd840582014-07-30 14:08:14 +090026
27config TARGET_MALTA
28 bool "Support malta"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +010029 select SUPPORTS_BIG_ENDIAN
30 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +010031 select SUPPORTS_CPU_MIPS32_R1
32 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck9d638ee2015-01-18 22:00:18 +010033 select SWAP_IO_SPACE
Masahiro Yamadadd840582014-07-30 14:08:14 +090034
35config TARGET_VCT
36 bool "Support vct"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +010037 select SUPPORTS_BIG_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +010038 select SUPPORTS_CPU_MIPS32_R1
39 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +000040 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +090041
42config TARGET_DBAU1X00
43 bool "Support dbau1x00"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +010044 select SUPPORTS_BIG_ENDIAN
45 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +010046 select SUPPORTS_CPU_MIPS32_R1
47 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +000048 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +090049
50config TARGET_PB1X00
51 bool "Support pb1x00"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +010052 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +010053 select SUPPORTS_CPU_MIPS32_R1
54 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +000055 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +090056
Masahiro Yamadadd840582014-07-30 14:08:14 +090057
58endchoice
59
60source "board/dbau1x00/Kconfig"
61source "board/imgtec/malta/Kconfig"
62source "board/micronas/vct/Kconfig"
63source "board/pb1x00/Kconfig"
64source "board/qemu-mips/Kconfig"
65
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +010066if MIPS
67
68choice
69 prompt "Endianness selection"
70 help
71 Some MIPS boards can be configured for either little or big endian
72 byte order. These modes require different U-Boot images. In general there
73 is one preferred byteorder for a particular system but some systems are
74 just as commonly used in the one or the other endianness.
75
76config SYS_BIG_ENDIAN
77 bool "Big endian"
78 depends on SUPPORTS_BIG_ENDIAN
79
80config SYS_LITTLE_ENDIAN
81 bool "Little endian"
82 depends on SUPPORTS_LITTLE_ENDIAN
83
84endchoice
85
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +010086choice
87 prompt "CPU selection"
88 default CPU_MIPS32_R2
89
90config CPU_MIPS32_R1
91 bool "MIPS32 Release 1"
92 depends on SUPPORTS_CPU_MIPS32_R1
93 select 32BIT
94 help
95 Choose this option to build an U-Boot for release 1 or later of the
96 MIPS32 architecture.
97
98config CPU_MIPS32_R2
99 bool "MIPS32 Release 2"
100 depends on SUPPORTS_CPU_MIPS32_R2
101 select 32BIT
102 help
103 Choose this option to build an U-Boot for release 2 or later of the
104 MIPS32 architecture.
105
106config CPU_MIPS64_R1
107 bool "MIPS64 Release 1"
108 depends on SUPPORTS_CPU_MIPS64_R1
109 select 64BIT
110 help
111 Choose this option to build a kernel for release 1 or later of the
112 MIPS64 architecture.
113
114config CPU_MIPS64_R2
115 bool "MIPS64 Release 2"
116 depends on SUPPORTS_CPU_MIPS64_R2
117 select 64BIT
118 help
119 Choose this option to build a kernel for release 2 or later of the
120 MIPS64 architecture.
121
122endchoice
123
Daniel Schwierzeck25fc6642015-01-14 21:44:13 +0100124menu "OS boot interface"
125
126config MIPS_BOOT_CMDLINE_LEGACY
127 bool "Hand over legacy command line to Linux kernel"
128 default y
129 help
130 Enable this option if you want U-Boot to hand over the Yamon-style
131 command line to the kernel. All bootargs will be prepared as argc/argv
132 compatible list. The argument count (argc) is stored in register $a0.
133 The address of the argument list (argv) is stored in register $a1.
134
Daniel Schwierzeckca65e582015-01-14 21:44:13 +0100135config MIPS_BOOT_ENV_LEGACY
136 bool "Hand over legacy environment to Linux kernel"
137 default y
138 help
139 Enable this option if you want U-Boot to hand over the Yamon-style
140 environment to the kernel. Information like memory size, initrd
141 address and size will be prepared as zero-terminated key/value list.
142 The address of the enviroment is stored in register $a2.
143
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100144config MIPS_BOOT_FDT
Daniel Schwierzeck90b1c9f2015-02-22 16:58:30 +0100145 bool "Hand over a flattened device tree to Linux kernel"
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100146 default n
147 help
148 Enable this option if you want U-Boot to hand over a flattened
Daniel Schwierzeck90b1c9f2015-02-22 16:58:30 +0100149 device tree to the kernel. According to UHI register $a0 will be set
150 to -2 and the FDT address is stored in $a1.
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100151
Daniel Schwierzeck25fc6642015-01-14 21:44:13 +0100152endmenu
153
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100154config SUPPORTS_BIG_ENDIAN
155 bool
156
157config SUPPORTS_LITTLE_ENDIAN
158 bool
159
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100160config SUPPORTS_CPU_MIPS32_R1
161 bool
162
163config SUPPORTS_CPU_MIPS32_R2
164 bool
165
166config SUPPORTS_CPU_MIPS64_R1
167 bool
168
169config SUPPORTS_CPU_MIPS64_R2
170 bool
171
Daniel Schwierzeckc57dafb2015-01-18 21:59:35 +0100172config CPU_MIPS32
173 bool
174 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
175
176config CPU_MIPS64
177 bool
178 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
179
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100180config 32BIT
181 bool
182
183config 64BIT
184 bool
185
Daniel Schwierzeck9d638ee2015-01-18 22:00:18 +0100186config SWAP_IO_SPACE
187 bool
188
Paul Burtondd7c7202015-01-29 01:28:02 +0000189config SYS_MIPS_CACHE_INIT_RAM_LOAD
190 bool
191
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100192endif
193
Masahiro Yamadadd840582014-07-30 14:08:14 +0900194endmenu