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Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +05301// SPDX-License-Identifier: GPL-2.0
2/*
Michal Simek420d4462019-05-21 12:07:23 +02003 * dts file for Xilinx ZynqMP ZCU1275 RevB
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +05304 *
Michal Simekd31f1c92020-02-18 08:38:06 +01005 * (C) Copyright 2018 - 2020, Xilinx, Inc.
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +05306 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
9 */
10
11/dts-v1/;
12
13#include "zynqmp.dtsi"
14#include "zynqmp-clk-ccf.dtsi"
15
16/ {
Michal Simek420d4462019-05-21 12:07:23 +020017 model = "ZynqMP ZCU1275 RevB";
18 compatible = "xlnx,zynqmp-zcu1275-revB", "xlnx,zynqmp-zcu1275",
19 "xlnx,zynqmp";
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053020
21 aliases {
22 serial0 = &uart0;
23 serial1 = &dcc;
24 spi0 = &qspi;
25 mmc0 = &sdhci1;
Siva Durga Prasad Paladugu59fbd5c2018-10-12 16:55:36 +053026 ethernet0 = &gem1;
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053027 };
28
29 chosen {
30 bootargs = "earlycon";
31 stdout-path = "serial0:115200n8";
32 };
33
34 memory@0 {
35 device_type = "memory";
36 reg = <0x0 0x0 0x0 0x80000000>;
37 };
38};
39
40&dcc {
41 status = "okay";
42};
43
Siva Durga Prasad Paladugu59fbd5c2018-10-12 16:55:36 +053044&gem1 {
45 status = "okay";
46 mdio {
47 #address-cells = <1>;
48 #size-cells = <0>;
49 phy1: ethernet-phy@1 {
50 reg = <1>; /* KSZ9031RNXIC on AES-FMC-NETW1-G */
51 rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */
52 txc-skew-ps = <1800>; /* Skew control of GTX_CLK pad input */
53 txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */
54 rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */
55 rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */
56 rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */
57 rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */
58 rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */
59 txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */
60 txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */
61 txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */
62 txd3-skew-ps = <900>; /* Skew control of TXD3 pad input */
63 };
64 };
65};
66
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053067&qspi {
68 status = "okay";
69 flash@0 {
Neil Armstrongffd4c7c2019-02-10 10:16:20 +000070 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053071 #address-cells = <1>;
72 #size-cells = <1>;
73 reg = <0x0>;
74 spi-tx-bus-width = <1>;
Venkatesh Yadav Abbarapu053d4bd2018-11-14 17:20:18 +053075 spi-rx-bus-width = <1>;
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053076 spi-max-frequency = <108000000>; /* Based on DC1 spec */
Michal Simek5df63a62020-02-14 14:19:56 +010077 partition@0 { /* for testing purpose */
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053078 label = "qspi-fsbl-uboot";
79 reg = <0x0 0x100000>;
80 };
Michal Simek5df63a62020-02-14 14:19:56 +010081 partition@100000 { /* for testing purpose */
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053082 label = "qspi-linux";
83 reg = <0x100000 0x500000>;
84 };
Michal Simek5df63a62020-02-14 14:19:56 +010085 partition@600000 { /* for testing purpose */
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053086 label = "qspi-device-tree";
87 reg = <0x600000 0x20000>;
88 };
Michal Simek5df63a62020-02-14 14:19:56 +010089 partition@620000 { /* for testing purpose */
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +053090 label = "qspi-rootfs";
91 reg = <0x620000 0x5E0000>;
92 };
93 };
94};
95
96&uart0 {
97 status = "okay";
98};
99
100&sdhci1 {
101 status = "okay";
T Karthik Reddy166fb462019-08-07 14:08:50 +0530102 /*
103 * 1.0 revision has level shifter and this property should be
104 * removed for supporting UHS mode
105 */
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +0530106 no-1-8-v;
Michal Simek01a6da12020-07-22 17:42:43 +0200107 xlnx,mio-bank = <1>;
Siva Durga Prasad Paladugu04ab29a2018-04-11 14:13:05 +0530108};