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Bo Shen927b9012014-11-10 15:24:02 +08001/*
2 * Configuration settings for the SAMA5D4EK board.
3 *
4 * Copyright (C) 2014 Atmel
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Wu, Joshb2d387b2015-03-30 14:51:19 +080013#include "at91-sama5_common.h"
Bo Shen927b9012014-11-10 15:24:02 +080014
Bo Shen927b9012014-11-10 15:24:02 +080015/* SDRAM */
16#define CONFIG_NR_DRAM_BANKS 1
17#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
18#define CONFIG_SYS_SDRAM_SIZE 0x20000000
19
Bo Shen5a4c9c22014-12-15 13:24:38 +080020#ifdef CONFIG_SPL_BUILD
Wenyou Yangef33aa32017-04-13 10:31:19 +080021#define CONFIG_SYS_INIT_SP_ADDR 0x218000
Bo Shen5a4c9c22014-12-15 13:24:38 +080022#else
Bo Shen927b9012014-11-10 15:24:02 +080023#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yangef33aa32017-04-13 10:31:19 +080024 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shen5a4c9c22014-12-15 13:24:38 +080025#endif
Bo Shen927b9012014-11-10 15:24:02 +080026
27#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
28
Bo Shen927b9012014-11-10 15:24:02 +080029#ifdef CONFIG_CMD_SF
Bo Shen927b9012014-11-10 15:24:02 +080030#define CONFIG_SF_DEFAULT_SPEED 30000000
31#endif
32
33/* NAND flash */
Bo Shen927b9012014-11-10 15:24:02 +080034#ifdef CONFIG_CMD_NAND
35#define CONFIG_NAND_ATMEL
36#define CONFIG_SYS_MAX_NAND_DEVICE 1
37#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
38/* our ALE is AD21 */
39#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
40/* our CLE is AD22 */
41#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
42#define CONFIG_SYS_NAND_ONFI_DETECTION
43/* PMECC & PMERRLOC */
44#define CONFIG_ATMEL_NAND_HWECC
45#define CONFIG_ATMEL_NAND_HW_PMECC
46#endif
47
Bo Shen927b9012014-11-10 15:24:02 +080048/* LCD */
Bo Shen927b9012014-11-10 15:24:02 +080049#define LCD_BPP LCD_COLOR16
50#define LCD_OUTPUT_BPP 18
51#define CONFIG_LCD_LOGO
52#define CONFIG_LCD_INFO
53#define CONFIG_LCD_INFO_BELOW_LOGO
Bo Shen927b9012014-11-10 15:24:02 +080054#define CONFIG_ATMEL_HLCD
55#define CONFIG_ATMEL_LCD_RGB565
Bo Shen927b9012014-11-10 15:24:02 +080056
57#ifdef CONFIG_SYS_USE_SERIALFLASH
Wu, Josh7a53b952015-08-19 19:11:21 +080058/* override the bootcmd, bootargs and other configuration for spi flash env*/
Bo Shen927b9012014-11-10 15:24:02 +080059#elif CONFIG_SYS_USE_NANDFLASH
Wu, Joshdc018fe2015-08-19 19:11:20 +080060/* override the bootcmd, bootargs and other configuration for nandflash env*/
Bo Shen927b9012014-11-10 15:24:02 +080061#elif CONFIG_SYS_USE_MMC
Wu, Josh372ca032015-08-19 19:11:18 +080062/* override the bootcmd, bootargs and other configuration for sd/mmc env */
Bo Shen927b9012014-11-10 15:24:02 +080063#endif
64
Bo Shen5a4c9c22014-12-15 13:24:38 +080065/* SPL */
66#define CONFIG_SPL_FRAMEWORK
67#define CONFIG_SPL_TEXT_BASE 0x200000
Wenyou Yangef33aa32017-04-13 10:31:19 +080068#define CONFIG_SPL_MAX_SIZE 0x18000
Bo Shen5a4c9c22014-12-15 13:24:38 +080069#define CONFIG_SPL_BSS_START_ADDR 0x20000000
70#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
71#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
72#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
73
Bo Shen5a4c9c22014-12-15 13:24:38 +080074#define CONFIG_SYS_MONITOR_LEN (512 << 10)
75
76#ifdef CONFIG_SYS_USE_MMC
Bo Shen5a4c9c22014-12-15 13:24:38 +080077#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
78#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen5a4c9c22014-12-15 13:24:38 +080079
80#elif CONFIG_SYS_USE_NANDFLASH
Bo Shen5a4c9c22014-12-15 13:24:38 +080081#define CONFIG_SPL_NAND_DRIVERS
82#define CONFIG_SPL_NAND_BASE
83#define CONFIG_PMECC_CAP 8
84#define CONFIG_PMECC_SECTOR_SIZE 512
85#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
86#define CONFIG_SYS_NAND_5_ADDR_CYCLE
87#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
88#define CONFIG_SYS_NAND_PAGE_COUNT 64
89#define CONFIG_SYS_NAND_OOBSIZE 224
90#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
91#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
92#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
93
94#elif CONFIG_SYS_USE_SERIALFLASH
Bo Shen5a4c9c22014-12-15 13:24:38 +080095#define CONFIG_SPL_SPI_LOAD
Wenyou Yangef33aa32017-04-13 10:31:19 +080096#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
Bo Shen5a4c9c22014-12-15 13:24:38 +080097
98#endif
Bo Shen927b9012014-11-10 15:24:02 +080099#endif