Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011 The Chromium OS Authors. |
| 3 | * (C) Copyright 2002-2006 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * |
| 6 | * (C) Copyright 2002 |
| 7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 8 | * Marius Groeger <mgroeger@sysgo.de> |
| 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| 29 | #include <common.h> |
| 30 | #include <linux/compiler.h> |
| 31 | #include <version.h> |
| 32 | #include <environment.h> |
| 33 | #include <fdtdec.h> |
Simon Glass | f828bf2 | 2013-04-20 08:42:41 +0000 | [diff] [blame] | 34 | #include <fs.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 35 | #if defined(CONFIG_CMD_IDE) |
| 36 | #include <ide.h> |
| 37 | #endif |
| 38 | #include <i2c.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 39 | #include <initcall.h> |
| 40 | #include <logbuff.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 41 | |
| 42 | /* TODO: Can we move these into arch/ headers? */ |
| 43 | #ifdef CONFIG_8xx |
| 44 | #include <mpc8xx.h> |
| 45 | #endif |
| 46 | #ifdef CONFIG_5xx |
| 47 | #include <mpc5xx.h> |
| 48 | #endif |
| 49 | #ifdef CONFIG_MPC5xxx |
| 50 | #include <mpc5xxx.h> |
| 51 | #endif |
| 52 | |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 53 | #include <os.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 54 | #include <post.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 55 | #include <spi.h> |
| 56 | #include <watchdog.h> |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 57 | #include <asm/errno.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 58 | #include <asm/io.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 59 | #ifdef CONFIG_MP |
| 60 | #include <asm/mp.h> |
| 61 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 62 | #include <asm/sections.h> |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 63 | #ifdef CONFIG_X86 |
| 64 | #include <asm/init_helpers.h> |
| 65 | #include <asm/relocate.h> |
| 66 | #endif |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 67 | #ifdef CONFIG_SANDBOX |
| 68 | #include <asm/state.h> |
| 69 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 70 | #include <linux/compiler.h> |
| 71 | |
| 72 | /* |
| 73 | * Pointer to initial global data area |
| 74 | * |
| 75 | * Here we initialize it if needed. |
| 76 | */ |
| 77 | #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR |
| 78 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR |
| 79 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ |
| 80 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); |
| 81 | #else |
| 82 | DECLARE_GLOBAL_DATA_PTR; |
| 83 | #endif |
| 84 | |
| 85 | /* |
| 86 | * sjg: IMO this code should be |
| 87 | * refactored to a single function, something like: |
| 88 | * |
| 89 | * void led_set_state(enum led_colour_t colour, int on); |
| 90 | */ |
| 91 | /************************************************************************ |
| 92 | * Coloured LED functionality |
| 93 | ************************************************************************ |
| 94 | * May be supplied by boards if desired |
| 95 | */ |
| 96 | inline void __coloured_LED_init(void) {} |
| 97 | void coloured_LED_init(void) |
| 98 | __attribute__((weak, alias("__coloured_LED_init"))); |
| 99 | inline void __red_led_on(void) {} |
| 100 | void red_led_on(void) __attribute__((weak, alias("__red_led_on"))); |
| 101 | inline void __red_led_off(void) {} |
| 102 | void red_led_off(void) __attribute__((weak, alias("__red_led_off"))); |
| 103 | inline void __green_led_on(void) {} |
| 104 | void green_led_on(void) __attribute__((weak, alias("__green_led_on"))); |
| 105 | inline void __green_led_off(void) {} |
| 106 | void green_led_off(void) __attribute__((weak, alias("__green_led_off"))); |
| 107 | inline void __yellow_led_on(void) {} |
| 108 | void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on"))); |
| 109 | inline void __yellow_led_off(void) {} |
| 110 | void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off"))); |
| 111 | inline void __blue_led_on(void) {} |
| 112 | void blue_led_on(void) __attribute__((weak, alias("__blue_led_on"))); |
| 113 | inline void __blue_led_off(void) {} |
| 114 | void blue_led_off(void) __attribute__((weak, alias("__blue_led_off"))); |
| 115 | |
| 116 | /* |
| 117 | * Why is gd allocated a register? Prior to reloc it might be better to |
| 118 | * just pass it around to each function in this file? |
| 119 | * |
| 120 | * After reloc one could argue that it is hardly used and doesn't need |
| 121 | * to be in a register. Or if it is it should perhaps hold pointers to all |
| 122 | * global data for all modules, so that post-reloc we can avoid the massive |
| 123 | * literal pool we get on ARM. Or perhaps just encourage each module to use |
| 124 | * a structure... |
| 125 | */ |
| 126 | |
| 127 | /* |
| 128 | * Could the CONFIG_SPL_BUILD infection become a flag in gd? |
| 129 | */ |
| 130 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 131 | #if defined(CONFIG_WATCHDOG) |
| 132 | static int init_func_watchdog_init(void) |
| 133 | { |
| 134 | puts(" Watchdog enabled\n"); |
| 135 | WATCHDOG_RESET(); |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | int init_func_watchdog_reset(void) |
| 141 | { |
| 142 | WATCHDOG_RESET(); |
| 143 | |
| 144 | return 0; |
| 145 | } |
| 146 | #endif /* CONFIG_WATCHDOG */ |
| 147 | |
| 148 | void __board_add_ram_info(int use_default) |
| 149 | { |
| 150 | /* please define platform specific board_add_ram_info() */ |
| 151 | } |
| 152 | |
| 153 | void board_add_ram_info(int) |
| 154 | __attribute__ ((weak, alias("__board_add_ram_info"))); |
| 155 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 156 | static int init_baud_rate(void) |
| 157 | { |
| 158 | gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); |
| 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | static int display_text_info(void) |
| 163 | { |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 164 | #ifndef CONFIG_SANDBOX |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 165 | ulong bss_start, bss_end; |
| 166 | |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 167 | #ifdef CONFIG_SYS_SYM_OFFSETS |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 168 | bss_start = _bss_start_ofs + _TEXT_BASE; |
| 169 | bss_end = _bss_end_ofs + _TEXT_BASE; |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 170 | #else |
| 171 | bss_start = (ulong)&__bss_start; |
| 172 | bss_end = (ulong)&__bss_end; |
| 173 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 174 | debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", |
| 175 | CONFIG_SYS_TEXT_BASE, bss_start, bss_end); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 176 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 177 | |
| 178 | #ifdef CONFIG_MODEM_SUPPORT |
| 179 | debug("Modem Support enabled\n"); |
| 180 | #endif |
| 181 | #ifdef CONFIG_USE_IRQ |
| 182 | debug("IRQ Stack: %08lx\n", IRQ_STACK_START); |
| 183 | debug("FIQ Stack: %08lx\n", FIQ_STACK_START); |
| 184 | #endif |
| 185 | |
| 186 | return 0; |
| 187 | } |
| 188 | |
| 189 | static int announce_dram_init(void) |
| 190 | { |
| 191 | puts("DRAM: "); |
| 192 | return 0; |
| 193 | } |
| 194 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 195 | #ifdef CONFIG_PPC |
| 196 | static int init_func_ram(void) |
| 197 | { |
| 198 | #ifdef CONFIG_BOARD_TYPES |
| 199 | int board_type = gd->board_type; |
| 200 | #else |
| 201 | int board_type = 0; /* use dummy arg */ |
| 202 | #endif |
| 203 | |
| 204 | gd->ram_size = initdram(board_type); |
| 205 | |
| 206 | if (gd->ram_size > 0) |
| 207 | return 0; |
| 208 | |
| 209 | puts("*** failed ***\n"); |
| 210 | return 1; |
| 211 | } |
| 212 | #endif |
| 213 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 214 | static int show_dram_config(void) |
| 215 | { |
| 216 | ulong size; |
| 217 | |
| 218 | #ifdef CONFIG_NR_DRAM_BANKS |
| 219 | int i; |
| 220 | |
| 221 | debug("\nRAM Configuration:\n"); |
| 222 | for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { |
| 223 | size += gd->bd->bi_dram[i].size; |
| 224 | debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); |
| 225 | #ifdef DEBUG |
| 226 | print_size(gd->bd->bi_dram[i].size, "\n"); |
| 227 | #endif |
| 228 | } |
| 229 | debug("\nDRAM: "); |
| 230 | #else |
| 231 | size = gd->ram_size; |
| 232 | #endif |
| 233 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 234 | print_size(size, ""); |
| 235 | board_add_ram_info(0); |
| 236 | putc('\n'); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 237 | |
| 238 | return 0; |
| 239 | } |
| 240 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 241 | ulong get_effective_memsize(void) |
| 242 | { |
| 243 | #ifndef CONFIG_VERY_BIG_RAM |
| 244 | return gd->ram_size; |
| 245 | #else |
| 246 | /* limit stack to what we can reasonable map */ |
| 247 | return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? |
| 248 | CONFIG_MAX_MEM_MAPPED : gd->ram_size); |
| 249 | #endif |
| 250 | } |
| 251 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 252 | void __dram_init_banksize(void) |
| 253 | { |
| 254 | #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) |
| 255 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
| 256 | gd->bd->bi_dram[0].size = get_effective_memsize(); |
| 257 | #endif |
| 258 | } |
| 259 | |
| 260 | void dram_init_banksize(void) |
| 261 | __attribute__((weak, alias("__dram_init_banksize"))); |
| 262 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 263 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) |
| 264 | static int init_func_i2c(void) |
| 265 | { |
| 266 | puts("I2C: "); |
| 267 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
| 268 | puts("ready\n"); |
| 269 | return 0; |
| 270 | } |
| 271 | #endif |
| 272 | |
| 273 | #if defined(CONFIG_HARD_SPI) |
| 274 | static int init_func_spi(void) |
| 275 | { |
| 276 | puts("SPI: "); |
| 277 | spi_init(); |
| 278 | puts("ready\n"); |
| 279 | return 0; |
| 280 | } |
| 281 | #endif |
| 282 | |
| 283 | __maybe_unused |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 284 | static int zero_global_data(void) |
| 285 | { |
| 286 | memset((void *)gd, '\0', sizeof(gd_t)); |
| 287 | |
| 288 | return 0; |
| 289 | } |
| 290 | |
| 291 | static int setup_mon_len(void) |
| 292 | { |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 293 | #ifdef CONFIG_SYS_SYM_OFFSETS |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 294 | gd->mon_len = _bss_end_ofs; |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 295 | #elif defined(CONFIG_SANDBOX) |
| 296 | gd->mon_len = (ulong)&_end - (ulong)_init; |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 297 | #else |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 298 | /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ |
| 299 | gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 300 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 301 | return 0; |
| 302 | } |
| 303 | |
| 304 | __weak int arch_cpu_init(void) |
| 305 | { |
| 306 | return 0; |
| 307 | } |
| 308 | |
Simon Glass | f828bf2 | 2013-04-20 08:42:41 +0000 | [diff] [blame] | 309 | #ifdef CONFIG_OF_HOSTFILE |
| 310 | |
| 311 | #define CHECK(x) err = (x); if (err) goto failed; |
| 312 | |
| 313 | /* Create an empty device tree blob */ |
| 314 | static int make_empty_fdt(void *fdt) |
| 315 | { |
| 316 | int err; |
| 317 | |
| 318 | CHECK(fdt_create(fdt, 256)); |
| 319 | CHECK(fdt_finish_reservemap(fdt)); |
| 320 | CHECK(fdt_begin_node(fdt, "")); |
| 321 | CHECK(fdt_end_node(fdt)); |
| 322 | CHECK(fdt_finish(fdt)); |
| 323 | |
| 324 | return 0; |
| 325 | failed: |
| 326 | printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); |
| 327 | return -EACCES; |
| 328 | } |
| 329 | |
| 330 | static int read_fdt_from_file(void) |
| 331 | { |
| 332 | struct sandbox_state *state = state_get_current(); |
| 333 | void *blob; |
| 334 | int size; |
| 335 | int err; |
| 336 | |
| 337 | blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); |
| 338 | if (!state->fdt_fname) { |
| 339 | err = make_empty_fdt(blob); |
| 340 | if (!err) |
| 341 | goto done; |
| 342 | return err; |
| 343 | } |
| 344 | err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX); |
| 345 | if (err) |
| 346 | return err; |
| 347 | size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0); |
| 348 | if (size < 0) |
| 349 | return -EIO; |
| 350 | |
| 351 | done: |
| 352 | gd->fdt_blob = blob; |
| 353 | |
| 354 | return 0; |
| 355 | } |
| 356 | #endif |
| 357 | |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 358 | #ifdef CONFIG_SANDBOX |
| 359 | static int setup_ram_buf(void) |
| 360 | { |
| 361 | gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE); |
| 362 | assert(gd->arch.ram_buf); |
| 363 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
| 364 | |
| 365 | return 0; |
| 366 | } |
| 367 | #endif |
| 368 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 369 | static int setup_fdt(void) |
| 370 | { |
| 371 | #ifdef CONFIG_OF_EMBED |
| 372 | /* Get a pointer to the FDT */ |
| 373 | gd->fdt_blob = _binary_dt_dtb_start; |
| 374 | #elif defined CONFIG_OF_SEPARATE |
| 375 | /* FDT is at end of image */ |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 376 | # ifdef CONFIG_SYS_SYM_OFFSETS |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 377 | gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE); |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 378 | # else |
| 379 | gd->fdt_blob = (ulong *)&_end; |
| 380 | # endif |
Simon Glass | f828bf2 | 2013-04-20 08:42:41 +0000 | [diff] [blame] | 381 | #elif defined(CONFIG_OF_HOSTFILE) |
| 382 | if (read_fdt_from_file()) { |
| 383 | puts("Failed to read control FDT\n"); |
| 384 | return -1; |
| 385 | } |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 386 | #endif |
| 387 | /* Allow the early environment to override the fdt address */ |
| 388 | gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, |
| 389 | (uintptr_t)gd->fdt_blob); |
| 390 | return 0; |
| 391 | } |
| 392 | |
| 393 | /* Get the top of usable RAM */ |
| 394 | __weak ulong board_get_usable_ram_top(ulong total_size) |
| 395 | { |
| 396 | return gd->ram_top; |
| 397 | } |
| 398 | |
| 399 | static int setup_dest_addr(void) |
| 400 | { |
| 401 | debug("Monitor len: %08lX\n", gd->mon_len); |
| 402 | /* |
| 403 | * Ram is setup, size stored in gd !! |
| 404 | */ |
| 405 | debug("Ram size: %08lX\n", (ulong)gd->ram_size); |
| 406 | #if defined(CONFIG_SYS_MEM_TOP_HIDE) |
| 407 | /* |
| 408 | * Subtract specified amount of memory to hide so that it won't |
| 409 | * get "touched" at all by U-Boot. By fixing up gd->ram_size |
| 410 | * the Linux kernel should now get passed the now "corrected" |
| 411 | * memory size and won't touch it either. This should work |
| 412 | * for arch/ppc and arch/powerpc. Only Linux board ports in |
| 413 | * arch/powerpc with bootwrapper support, that recalculate the |
| 414 | * memory size from the SDRAM controller setup will have to |
| 415 | * get fixed. |
| 416 | */ |
| 417 | gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; |
| 418 | #endif |
| 419 | #ifdef CONFIG_SYS_SDRAM_BASE |
| 420 | gd->ram_top = CONFIG_SYS_SDRAM_BASE; |
| 421 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 422 | gd->ram_top += get_effective_memsize(); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 423 | gd->ram_top = board_get_usable_ram_top(gd->mon_len); |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 424 | gd->relocaddr = gd->ram_top; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 425 | debug("Ram top: %08lX\n", (ulong)gd->ram_top); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 426 | #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) |
| 427 | /* |
| 428 | * We need to make sure the location we intend to put secondary core |
| 429 | * boot code is reserved and not used by any part of u-boot |
| 430 | */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 431 | if (gd->relocaddr > determine_mp_bootpg(NULL)) { |
| 432 | gd->relocaddr = determine_mp_bootpg(NULL); |
| 433 | debug("Reserving MP boot page to %08lx\n", gd->relocaddr); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 434 | } |
| 435 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 436 | return 0; |
| 437 | } |
| 438 | |
| 439 | #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) |
| 440 | static int reserve_logbuffer(void) |
| 441 | { |
| 442 | /* reserve kernel log buffer */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 443 | gd->relocaddr -= LOGBUFF_RESERVE; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 444 | debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 445 | gd->relocaddr); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 446 | return 0; |
| 447 | } |
| 448 | #endif |
| 449 | |
| 450 | #ifdef CONFIG_PRAM |
| 451 | /* reserve protected RAM */ |
| 452 | static int reserve_pram(void) |
| 453 | { |
| 454 | ulong reg; |
| 455 | |
| 456 | reg = getenv_ulong("pram", 10, CONFIG_PRAM); |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 457 | gd->relocaddr -= (reg << 10); /* size is in kB */ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 458 | debug("Reserving %ldk for protected RAM at %08lx\n", reg, |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 459 | gd->relocaddr); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 460 | return 0; |
| 461 | } |
| 462 | #endif /* CONFIG_PRAM */ |
| 463 | |
| 464 | /* Round memory pointer down to next 4 kB limit */ |
| 465 | static int reserve_round_4k(void) |
| 466 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 467 | gd->relocaddr &= ~(4096 - 1); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 468 | return 0; |
| 469 | } |
| 470 | |
| 471 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ |
| 472 | defined(CONFIG_ARM) |
| 473 | static int reserve_mmu(void) |
| 474 | { |
| 475 | /* reserve TLB table */ |
| 476 | gd->arch.tlb_size = 4096 * 4; |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 477 | gd->relocaddr -= gd->arch.tlb_size; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 478 | |
| 479 | /* round down to next 64 kB limit */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 480 | gd->relocaddr &= ~(0x10000 - 1); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 481 | |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 482 | gd->arch.tlb_addr = gd->relocaddr; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 483 | debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, |
| 484 | gd->arch.tlb_addr + gd->arch.tlb_size); |
| 485 | return 0; |
| 486 | } |
| 487 | #endif |
| 488 | |
| 489 | #ifdef CONFIG_LCD |
| 490 | static int reserve_lcd(void) |
| 491 | { |
| 492 | #ifdef CONFIG_FB_ADDR |
| 493 | gd->fb_base = CONFIG_FB_ADDR; |
| 494 | #else |
| 495 | /* reserve memory for LCD display (always full pages) */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 496 | gd->relocaddr = lcd_setmem(gd->relocaddr); |
| 497 | gd->fb_base = gd->relocaddr; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 498 | #endif /* CONFIG_FB_ADDR */ |
| 499 | return 0; |
| 500 | } |
| 501 | #endif /* CONFIG_LCD */ |
| 502 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 503 | #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 504 | && !defined(CONFIG_ARM) && !defined(CONFIG_X86) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 505 | static int reserve_video(void) |
| 506 | { |
| 507 | /* reserve memory for video display (always full pages) */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 508 | gd->relocaddr = video_setmem(gd->relocaddr); |
| 509 | gd->fb_base = gd->relocaddr; |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 510 | |
| 511 | return 0; |
| 512 | } |
| 513 | #endif |
| 514 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 515 | static int reserve_uboot(void) |
| 516 | { |
| 517 | /* |
| 518 | * reserve memory for U-Boot code, data & bss |
| 519 | * round down to next 4 kB limit |
| 520 | */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 521 | gd->relocaddr -= gd->mon_len; |
| 522 | gd->relocaddr &= ~(4096 - 1); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 523 | #ifdef CONFIG_E500 |
| 524 | /* round down to next 64 kB limit so that IVPR stays aligned */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 525 | gd->relocaddr &= ~(65536 - 1); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 526 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 527 | |
| 528 | debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 529 | gd->relocaddr); |
| 530 | |
| 531 | gd->start_addr_sp = gd->relocaddr; |
| 532 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 533 | return 0; |
| 534 | } |
| 535 | |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 536 | #ifndef CONFIG_SPL_BUILD |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 537 | /* reserve memory for malloc() area */ |
| 538 | static int reserve_malloc(void) |
| 539 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 540 | gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 541 | debug("Reserving %dk for malloc() at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 542 | TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 543 | return 0; |
| 544 | } |
| 545 | |
| 546 | /* (permanently) allocate a Board Info struct */ |
| 547 | static int reserve_board(void) |
| 548 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 549 | gd->start_addr_sp -= sizeof(bd_t); |
| 550 | gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 551 | memset(gd->bd, '\0', sizeof(bd_t)); |
| 552 | debug("Reserving %zu Bytes for Board Info at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 553 | sizeof(bd_t), gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 554 | return 0; |
| 555 | } |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 556 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 557 | |
| 558 | static int setup_machine(void) |
| 559 | { |
| 560 | #ifdef CONFIG_MACH_TYPE |
| 561 | gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ |
| 562 | #endif |
| 563 | return 0; |
| 564 | } |
| 565 | |
| 566 | static int reserve_global_data(void) |
| 567 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 568 | gd->start_addr_sp -= sizeof(gd_t); |
| 569 | gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 570 | debug("Reserving %zu Bytes for Global Data at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 571 | sizeof(gd_t), gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 572 | return 0; |
| 573 | } |
| 574 | |
| 575 | static int reserve_fdt(void) |
| 576 | { |
| 577 | /* |
| 578 | * If the device tree is sitting immediate above our image then we |
| 579 | * must relocate it. If it is embedded in the data section, then it |
| 580 | * will be relocated with other data. |
| 581 | */ |
| 582 | if (gd->fdt_blob) { |
| 583 | gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); |
| 584 | |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 585 | gd->start_addr_sp -= gd->fdt_size; |
| 586 | gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 587 | debug("Reserving %lu Bytes for FDT at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 588 | gd->fdt_size, gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 589 | } |
| 590 | |
| 591 | return 0; |
| 592 | } |
| 593 | |
| 594 | static int reserve_stacks(void) |
| 595 | { |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 596 | #ifdef CONFIG_SPL_BUILD |
| 597 | # ifdef CONFIG_ARM |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 598 | gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ |
| 599 | gd->irq_sp = gd->start_addr_sp; |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 600 | # endif |
| 601 | #else |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 602 | # ifdef CONFIG_PPC |
| 603 | ulong *s; |
| 604 | # endif |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 605 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 606 | /* setup stack pointer for exceptions */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 607 | gd->start_addr_sp -= 16; |
| 608 | gd->start_addr_sp &= ~0xf; |
| 609 | gd->irq_sp = gd->start_addr_sp; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 610 | |
| 611 | /* |
| 612 | * Handle architecture-specific things here |
| 613 | * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() |
| 614 | * to handle this and put in arch/xxx/lib/stack.c |
| 615 | */ |
| 616 | # ifdef CONFIG_ARM |
| 617 | # ifdef CONFIG_USE_IRQ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 618 | gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 619 | debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 620 | CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 621 | |
| 622 | /* 8-byte alignment for ARM ABI compliance */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 623 | gd->start_addr_sp &= ~0x07; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 624 | # endif |
| 625 | /* leave 3 words for abort-stack, plus 1 for alignment */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 626 | gd->start_addr_sp -= 16; |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 627 | # elif defined(CONFIG_PPC) |
| 628 | /* Clear initial stack frame */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 629 | s = (ulong *) gd->start_addr_sp; |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 630 | *s = 0; /* Terminate back chain */ |
| 631 | *++s = 0; /* NULL return address */ |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 632 | # endif /* Architecture specific code */ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 633 | |
| 634 | return 0; |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 635 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 636 | } |
| 637 | |
| 638 | static int display_new_sp(void) |
| 639 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 640 | debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 641 | |
| 642 | return 0; |
| 643 | } |
| 644 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 645 | #ifdef CONFIG_PPC |
| 646 | static int setup_board_part1(void) |
| 647 | { |
| 648 | bd_t *bd = gd->bd; |
| 649 | |
| 650 | /* |
| 651 | * Save local variables to board info struct |
| 652 | */ |
| 653 | |
| 654 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ |
| 655 | bd->bi_memsize = gd->ram_size; /* size in bytes */ |
| 656 | |
| 657 | #ifdef CONFIG_SYS_SRAM_BASE |
| 658 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ |
| 659 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ |
| 660 | #endif |
| 661 | |
| 662 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
| 663 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
| 664 | bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ |
| 665 | #endif |
| 666 | #if defined(CONFIG_MPC5xxx) |
| 667 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
| 668 | #endif |
| 669 | #if defined(CONFIG_MPC83xx) |
| 670 | bd->bi_immrbar = CONFIG_SYS_IMMR; |
| 671 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 672 | |
| 673 | return 0; |
| 674 | } |
| 675 | |
| 676 | static int setup_board_part2(void) |
| 677 | { |
| 678 | bd_t *bd = gd->bd; |
| 679 | |
| 680 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ |
| 681 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ |
| 682 | #if defined(CONFIG_CPM2) |
| 683 | bd->bi_cpmfreq = gd->arch.cpm_clk; |
| 684 | bd->bi_brgfreq = gd->arch.brg_clk; |
| 685 | bd->bi_sccfreq = gd->arch.scc_clk; |
| 686 | bd->bi_vco = gd->arch.vco_out; |
| 687 | #endif /* CONFIG_CPM2 */ |
| 688 | #if defined(CONFIG_MPC512X) |
| 689 | bd->bi_ipsfreq = gd->arch.ips_clk; |
| 690 | #endif /* CONFIG_MPC512X */ |
| 691 | #if defined(CONFIG_MPC5xxx) |
| 692 | bd->bi_ipbfreq = gd->arch.ipb_clk; |
| 693 | bd->bi_pcifreq = gd->pci_clk; |
| 694 | #endif /* CONFIG_MPC5xxx */ |
| 695 | |
| 696 | return 0; |
| 697 | } |
| 698 | #endif |
| 699 | |
| 700 | #ifdef CONFIG_SYS_EXTBDINFO |
| 701 | static int setup_board_extra(void) |
| 702 | { |
| 703 | bd_t *bd = gd->bd; |
| 704 | |
| 705 | strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); |
| 706 | strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, |
| 707 | sizeof(bd->bi_r_version)); |
| 708 | |
| 709 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ |
| 710 | bd->bi_plb_busfreq = gd->bus_clk; |
| 711 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ |
| 712 | defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ |
| 713 | defined(CONFIG_440EPX) || defined(CONFIG_440GRX) |
| 714 | bd->bi_pci_busfreq = get_PCI_freq(); |
| 715 | bd->bi_opbfreq = get_OPB_freq(); |
| 716 | #elif defined(CONFIG_XILINX_405) |
| 717 | bd->bi_pci_busfreq = get_PCI_freq(); |
| 718 | #endif |
| 719 | |
| 720 | return 0; |
| 721 | } |
| 722 | #endif |
| 723 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 724 | #ifdef CONFIG_POST |
| 725 | static int init_post(void) |
| 726 | { |
| 727 | post_bootmode_init(); |
| 728 | post_run(NULL, POST_ROM | post_bootmode_get(0)); |
| 729 | |
| 730 | return 0; |
| 731 | } |
| 732 | #endif |
| 733 | |
| 734 | static int setup_baud_rate(void) |
| 735 | { |
| 736 | /* Ick, can we get rid of this line? */ |
| 737 | gd->bd->bi_baudrate = gd->baudrate; |
| 738 | |
| 739 | return 0; |
| 740 | } |
| 741 | |
| 742 | static int setup_dram_config(void) |
| 743 | { |
| 744 | /* Ram is board specific, so move it to board code ... */ |
| 745 | dram_init_banksize(); |
| 746 | |
| 747 | return 0; |
| 748 | } |
| 749 | |
| 750 | static int reloc_fdt(void) |
| 751 | { |
| 752 | if (gd->new_fdt) { |
| 753 | memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); |
| 754 | gd->fdt_blob = gd->new_fdt; |
| 755 | } |
| 756 | |
| 757 | return 0; |
| 758 | } |
| 759 | |
| 760 | static int setup_reloc(void) |
| 761 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 762 | gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 763 | memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); |
| 764 | |
| 765 | debug("Relocation Offset is: %08lx\n", gd->reloc_off); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 766 | debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 767 | gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), |
| 768 | gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 769 | |
| 770 | return 0; |
| 771 | } |
| 772 | |
| 773 | /* ARM calls relocate_code from its crt0.S */ |
| 774 | #if !defined(CONFIG_ARM) |
| 775 | |
| 776 | static int jump_to_copy(void) |
| 777 | { |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 778 | /* |
| 779 | * x86 is special, but in a nice way. It uses a trampoline which |
| 780 | * enables the dcache if possible. |
| 781 | * |
| 782 | * For now, other archs use relocate_code(), which is implemented |
| 783 | * similarly for all archs. When we do generic relocation, hopefully |
| 784 | * we can make all archs enable the dcache prior to relocation. |
| 785 | */ |
| 786 | #ifdef CONFIG_X86 |
| 787 | /* |
| 788 | * SDRAM and console are now initialised. The final stack can now |
| 789 | * be setup in SDRAM. Code execution will continue in Flash, but |
| 790 | * with the stack in SDRAM and Global Data in temporary memory |
| 791 | * (CPU cache) |
| 792 | */ |
| 793 | board_init_f_r_trampoline(gd->start_addr_sp); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 794 | #elif defined(CONFIG_SANDBOX) |
| 795 | board_init_r(gd->new_gd, 0); |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 796 | #else |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 797 | relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 798 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 799 | |
| 800 | return 0; |
| 801 | } |
| 802 | #endif |
| 803 | |
| 804 | /* Record the board_init_f() bootstage (after arch_cpu_init()) */ |
| 805 | static int mark_bootstage(void) |
| 806 | { |
| 807 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); |
| 808 | |
| 809 | return 0; |
| 810 | } |
| 811 | |
| 812 | static init_fnc_t init_sequence_f[] = { |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 813 | #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ |
| 814 | !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ |
Simon Glass | 7525c2d | 2013-04-15 11:25:20 +0000 | [diff] [blame] | 815 | !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 816 | zero_global_data, |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 817 | #endif |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 818 | #ifdef CONFIG_SANDBOX |
| 819 | setup_ram_buf, |
| 820 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 821 | setup_fdt, |
| 822 | setup_mon_len, |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 823 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
| 824 | /* TODO: can this go into arch_cpu_init()? */ |
| 825 | probecpu, |
| 826 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 827 | arch_cpu_init, /* basic arch cpu dependent setup */ |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 828 | #ifdef CONFIG_X86 |
| 829 | cpu_init_f, /* TODO(sjg@chromium.org): remove */ |
| 830 | # ifdef CONFIG_OF_CONTROL |
| 831 | find_fdt, /* TODO(sjg@chromium.org): remove */ |
| 832 | # endif |
| 833 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 834 | mark_bootstage, |
| 835 | #ifdef CONFIG_OF_CONTROL |
| 836 | fdtdec_check_fdt, |
| 837 | #endif |
| 838 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
| 839 | board_early_init_f, |
| 840 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 841 | /* TODO: can any of this go into arch_cpu_init()? */ |
| 842 | #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) |
| 843 | get_clocks, /* get CPU and bus clocks (etc.) */ |
| 844 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ |
| 845 | && !defined(CONFIG_TQM885D) |
| 846 | adjust_sdram_tbs_8xx, |
| 847 | #endif |
| 848 | /* TODO: can we rename this to timer_init()? */ |
| 849 | init_timebase, |
| 850 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 851 | #ifdef CONFIG_ARM |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 852 | timer_init, /* initialize timer */ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 853 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 854 | #ifdef CONFIG_SYS_ALLOC_DPRAM |
| 855 | #if !defined(CONFIG_CPM2) |
| 856 | dpram_init, |
| 857 | #endif |
| 858 | #endif |
| 859 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
| 860 | board_postclk_init, |
| 861 | #endif |
Masahiro Yamada | b8521b7 | 2013-05-21 21:08:09 +0000 | [diff] [blame] | 862 | #ifdef CONFIG_FSL_ESDHC |
| 863 | get_clocks, |
| 864 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 865 | env_init, /* initialize environment */ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 866 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
| 867 | /* get CPU and bus clocks according to the environment variable */ |
| 868 | get_clocks_866, |
| 869 | /* adjust sdram refresh rate according to the new clock */ |
| 870 | sdram_adjust_866, |
| 871 | init_timebase, |
| 872 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 873 | init_baud_rate, /* initialze baudrate settings */ |
| 874 | serial_init, /* serial communications setup */ |
| 875 | console_init_f, /* stage 1 init of console */ |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 876 | #ifdef CONFIG_SANDBOX |
| 877 | sandbox_early_getopt_check, |
| 878 | #endif |
| 879 | #ifdef CONFIG_OF_CONTROL |
| 880 | fdtdec_prepare_fdt, |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 881 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 882 | display_options, /* say that we are here */ |
| 883 | display_text_info, /* show debugging info if required */ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 884 | #if defined(CONFIG_8260) |
| 885 | prt_8260_rsr, |
| 886 | prt_8260_clks, |
| 887 | #endif /* CONFIG_8260 */ |
| 888 | #if defined(CONFIG_MPC83xx) |
| 889 | prt_83xx_rsr, |
| 890 | #endif |
| 891 | #ifdef CONFIG_PPC |
| 892 | checkcpu, |
| 893 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 894 | #if defined(CONFIG_DISPLAY_CPUINFO) |
| 895 | print_cpuinfo, /* display cpu info (and speed) */ |
| 896 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 897 | #if defined(CONFIG_MPC5xxx) |
| 898 | prt_mpc5xxx_clks, |
| 899 | #endif /* CONFIG_MPC5xxx */ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 900 | #if defined(CONFIG_DISPLAY_BOARDINFO) |
| 901 | checkboard, /* display board info */ |
| 902 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 903 | INIT_FUNC_WATCHDOG_INIT |
| 904 | #if defined(CONFIG_MISC_INIT_F) |
| 905 | misc_init_f, |
| 906 | #endif |
| 907 | INIT_FUNC_WATCHDOG_RESET |
| 908 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) |
| 909 | init_func_i2c, |
| 910 | #endif |
| 911 | #if defined(CONFIG_HARD_SPI) |
| 912 | init_func_spi, |
| 913 | #endif |
| 914 | #ifdef CONFIG_X86 |
| 915 | dram_init_f, /* configure available RAM banks */ |
Simon Glass | 8b42dfc | 2013-04-15 11:22:49 +0000 | [diff] [blame] | 916 | calculate_relocation_address, |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 917 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 918 | announce_dram_init, |
| 919 | /* TODO: unify all these dram functions? */ |
| 920 | #ifdef CONFIG_ARM |
| 921 | dram_init, /* configure available RAM banks */ |
| 922 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 923 | #ifdef CONFIG_PPC |
| 924 | init_func_ram, |
| 925 | #endif |
| 926 | #ifdef CONFIG_POST |
| 927 | post_init_f, |
| 928 | #endif |
| 929 | INIT_FUNC_WATCHDOG_RESET |
| 930 | #if defined(CONFIG_SYS_DRAM_TEST) |
| 931 | testdram, |
| 932 | #endif /* CONFIG_SYS_DRAM_TEST */ |
| 933 | INIT_FUNC_WATCHDOG_RESET |
| 934 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 935 | #ifdef CONFIG_POST |
| 936 | init_post, |
| 937 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 938 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 939 | /* |
| 940 | * Now that we have DRAM mapped and working, we can |
| 941 | * relocate the code and continue running from DRAM. |
| 942 | * |
| 943 | * Reserve memory at end of RAM for (top down in that order): |
| 944 | * - area that won't get touched by U-Boot and Linux (optional) |
| 945 | * - kernel log buffer |
| 946 | * - protected RAM |
| 947 | * - LCD framebuffer |
| 948 | * - monitor code |
| 949 | * - board info struct |
| 950 | */ |
| 951 | setup_dest_addr, |
| 952 | #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) |
| 953 | reserve_logbuffer, |
| 954 | #endif |
| 955 | #ifdef CONFIG_PRAM |
| 956 | reserve_pram, |
| 957 | #endif |
| 958 | reserve_round_4k, |
| 959 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ |
| 960 | defined(CONFIG_ARM) |
| 961 | reserve_mmu, |
| 962 | #endif |
| 963 | #ifdef CONFIG_LCD |
| 964 | reserve_lcd, |
| 965 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 966 | /* TODO: Why the dependency on CONFIG_8xx? */ |
| 967 | #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 968 | && !defined(CONFIG_ARM) && !defined(CONFIG_X86) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 969 | reserve_video, |
| 970 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 971 | reserve_uboot, |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 972 | #ifndef CONFIG_SPL_BUILD |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 973 | reserve_malloc, |
| 974 | reserve_board, |
Simon Glass | 8cae8a6 | 2013-03-05 14:39:45 +0000 | [diff] [blame] | 975 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 976 | setup_machine, |
| 977 | reserve_global_data, |
| 978 | reserve_fdt, |
| 979 | reserve_stacks, |
| 980 | setup_dram_config, |
| 981 | show_dram_config, |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 982 | #ifdef CONFIG_PPC |
| 983 | setup_board_part1, |
| 984 | INIT_FUNC_WATCHDOG_RESET |
| 985 | setup_board_part2, |
| 986 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 987 | setup_baud_rate, |
| 988 | display_new_sp, |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 989 | #ifdef CONFIG_SYS_EXTBDINFO |
| 990 | setup_board_extra, |
| 991 | #endif |
| 992 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 993 | reloc_fdt, |
| 994 | setup_reloc, |
| 995 | #ifndef CONFIG_ARM |
| 996 | jump_to_copy, |
| 997 | #endif |
| 998 | NULL, |
| 999 | }; |
| 1000 | |
| 1001 | void board_init_f(ulong boot_flags) |
| 1002 | { |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1003 | #ifndef CONFIG_X86 |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1004 | gd_t data; |
| 1005 | |
| 1006 | gd = &data; |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1007 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1008 | |
| 1009 | gd->flags = boot_flags; |
| 1010 | |
| 1011 | if (initcall_run_list(init_sequence_f)) |
| 1012 | hang(); |
| 1013 | |
| 1014 | #ifndef CONFIG_ARM |
| 1015 | /* NOTREACHED - jump_to_copy() does not return */ |
| 1016 | hang(); |
| 1017 | #endif |
| 1018 | } |
| 1019 | |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 1020 | #ifdef CONFIG_X86 |
| 1021 | /* |
| 1022 | * For now this code is only used on x86. |
| 1023 | * |
| 1024 | * init_sequence_f_r is the list of init functions which are run when |
| 1025 | * U-Boot is executing from Flash with a semi-limited 'C' environment. |
| 1026 | * The following limitations must be considered when implementing an |
| 1027 | * '_f_r' function: |
| 1028 | * - 'static' variables are read-only |
| 1029 | * - Global Data (gd->xxx) is read/write |
| 1030 | * |
| 1031 | * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if |
| 1032 | * supported). It _should_, if possible, copy global data to RAM and |
| 1033 | * initialise the CPU caches (to speed up the relocation process) |
| 1034 | * |
| 1035 | * NOTE: At present only x86 uses this route, but it is intended that |
| 1036 | * all archs will move to this when generic relocation is implemented. |
| 1037 | */ |
| 1038 | static init_fnc_t init_sequence_f_r[] = { |
| 1039 | init_cache_f_r, |
| 1040 | copy_uboot_to_ram, |
| 1041 | clear_bss, |
| 1042 | do_elf_reloc_fixups, |
| 1043 | |
| 1044 | NULL, |
| 1045 | }; |
| 1046 | |
| 1047 | void board_init_f_r(void) |
| 1048 | { |
| 1049 | if (initcall_run_list(init_sequence_f_r)) |
| 1050 | hang(); |
| 1051 | |
| 1052 | /* |
| 1053 | * U-Boot has been copied into SDRAM, the BSS has been cleared etc. |
| 1054 | * Transfer execution from Flash to RAM by calculating the address |
| 1055 | * of the in-RAM copy of board_init_r() and calling it |
| 1056 | */ |
| 1057 | (board_init_r + gd->reloc_off)(gd, gd->relocaddr); |
| 1058 | |
| 1059 | /* NOTREACHED - board_init_r() does not return */ |
| 1060 | hang(); |
| 1061 | } |
| 1062 | #endif /* CONFIG_X86 */ |