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Kumar Gala47d41cc2009-02-05 20:40:57 -06001/*
Kumar Gala21608272010-03-30 23:06:53 -05002 * Copyright 2009-2010 Freescale Semiconductor, Inc.
Kumar Gala47d41cc2009-02-05 20:40:57 -06003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 *
19 */
20
21#ifndef _ASM_CONFIG_H_
22#define _ASM_CONFIG_H_
23
Mike Frysingera16028d2009-11-03 11:35:59 -050024#define CONFIG_LMB
25
Kumar Gala87c90632009-02-05 20:40:58 -060026#ifndef CONFIG_MAX_MEM_MAPPED
Becky Brucebd767292009-02-23 13:56:51 -060027#if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
Kumar Gala87c90632009-02-05 20:40:58 -060028#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
29#else
Stefan Roese2ede8792009-02-11 09:37:12 +010030#define CONFIG_MAX_MEM_MAPPED (256 << 20)
Kumar Gala87c90632009-02-05 20:40:58 -060031#endif
32#endif
33
Peter Tyserf732a752009-07-15 00:01:08 -050034/* Check if boards need to enable FSL DMA engine for SDRAM init */
35#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
36#if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
37 ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
38 !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
Peter Tyser017f11f2009-06-30 17:15:40 -050039#define CONFIG_FSL_DMA
Kumar Gala47d41cc2009-02-05 20:40:57 -060040#endif
Peter Tyser017f11f2009-06-30 17:15:40 -050041#endif
42
Poonam Aggrwal3b1f2432009-08-20 18:55:35 +053043#if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \
Kumar Gala21608272010-03-30 23:06:53 -050044 defined(CONFIG_P1021) || defined(CONFIG_P1022) || \
Poonam Aggrwal3b1f2432009-08-20 18:55:35 +053045 defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
Kumar Gala7e4259b2009-03-19 02:39:17 -050046#define CONFIG_MAX_CPUS 2
47#elif defined(CONFIG_PPC_P4080)
48#define CONFIG_MAX_CPUS 8
Poonam Aggrwal0e870982009-07-31 12:08:14 +053049#else
Kumar Gala7e4259b2009-03-19 02:39:17 -050050#define CONFIG_MAX_CPUS 1
Poonam Aggrwal0e870982009-07-31 12:08:14 +053051#endif
52
Peter Tyser5ccd29c2009-10-23 15:55:47 -050053/*
54 * Provide a default boot page translation virtual address that lines up with
55 * Freescale's default e500 reset page.
56 */
57#if (defined(CONFIG_E500) && defined(CONFIG_MP))
58#ifndef CONFIG_BPTR_VIRT_ADDR
59#define CONFIG_BPTR_VIRT_ADDR 0xfffff000
60#endif
61#endif
62
Kumar Gala3ad89c42009-10-31 11:23:41 -050063/* Enable TSEC2.0 for the platforms that have it if we are using TSEC */
64#if defined(CONFIG_TSEC_ENET) && \
65 (defined(CONFIG_P1020) || defined(CONFIG_P1011))
66#define CONFIG_TSECV2
67#endif
68
Kumar Gala94e94112009-11-12 10:26:16 -060069/* Number of TLB CAM entries we have on FSL Book-E chips */
70#if defined(CONFIG_E500MC)
71#define CONFIG_SYS_NUM_TLBCAMS 64
72#elif defined(CONFIG_E500)
73#define CONFIG_SYS_NUM_TLBCAMS 16
74#endif
75
Peter Tyser85829012009-09-21 11:20:25 -050076/* Relocation to SDRAM works on all PPC boards */
77#define CONFIG_RELOC_FIXUP_WORKS
78
Peter Tyser017f11f2009-06-30 17:15:40 -050079#endif /* _ASM_CONFIG_H_ */