Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
| 4 | CONFIG_ARCH_ROCKCHIP=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 5 | CONFIG_SPL_GPIO=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3" |
| 7 | CONFIG_ROCKCHIP_RK3568=y |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 8 | CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 9 | CONFIG_SPL_SERIAL=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 10 | CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 11 | CONFIG_DEBUG_UART_BASE=0xFE660000 |
| 12 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 13 | CONFIG_SYS_LOAD_ADDR=0xc00800 |
| 14 | CONFIG_DEBUG_UART=y |
| 15 | CONFIG_FIT=y |
| 16 | CONFIG_FIT_VERBOSE=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 17 | CONFIG_SPL_FIT_SIGNATURE=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 18 | CONFIG_SPL_LOAD_FIT=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 19 | CONFIG_LEGACY_IMAGE_FORMAT=y |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 20 | CONFIG_OF_BOARD_SETUP=y |
| 21 | CONFIG_OF_STDOUT_VIA_ALIAS=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 22 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-anbernic-rgxx3.dtb" |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 23 | # CONFIG_CONSOLE_MUX is not set |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 24 | # CONFIG_DISPLAY_CPUINFO is not set |
| 25 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 26 | CONFIG_BOARD_RNG_SEED=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 27 | CONFIG_SPL_MAX_SIZE=0x40000 |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 28 | CONFIG_SPL_PAD_TO=0x7f8000 |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 29 | CONFIG_SPL_BOARD_INIT=y |
| 30 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 31 | CONFIG_SPL_POWER=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 32 | CONFIG_SPL_ATF=y |
| 33 | CONFIG_CMD_PWM=y |
| 34 | CONFIG_CMD_GPT=y |
| 35 | CONFIG_CMD_MMC=y |
| 36 | # CONFIG_CMD_SETEXPR is not set |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 37 | # CONFIG_CMD_CLS is not set |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 38 | # CONFIG_SPL_DOS_PARTITION is not set |
| 39 | CONFIG_SPL_OF_CONTROL=y |
| 40 | CONFIG_OF_LIVE=y |
Jonas Karlman | 7b00e7e | 2024-05-04 19:43:00 +0000 | [diff] [blame] | 41 | # CONFIG_OF_UPSTREAM is not set |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 42 | CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 43 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| 44 | # CONFIG_NET is not set |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 45 | CONFIG_SPL_DM_SEQ_ALIAS=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 46 | CONFIG_SPL_REGMAP=y |
| 47 | CONFIG_SPL_SYSCON=y |
| 48 | CONFIG_SPL_CLK=y |
| 49 | CONFIG_ARM_SMCCC_FEATURES=y |
| 50 | CONFIG_SCMI_FIRMWARE=y |
| 51 | CONFIG_ROCKCHIP_GPIO=y |
| 52 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 53 | CONFIG_MISC=y |
| 54 | CONFIG_SUPPORT_EMMC_RPMB=y |
| 55 | CONFIG_MMC_DW=y |
| 56 | CONFIG_MMC_DW_ROCKCHIP=y |
| 57 | CONFIG_MMC_SDHCI=y |
| 58 | CONFIG_MMC_SDHCI_SDMA=y |
| 59 | CONFIG_MMC_SDHCI_ROCKCHIP=y |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 60 | CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 61 | CONFIG_SPL_PINCTRL=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 62 | CONFIG_DM_PMIC=y |
| 63 | CONFIG_DM_PMIC_FAN53555=y |
| 64 | CONFIG_PMIC_RK8XX=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 65 | CONFIG_SPL_DM_REGULATOR=y |
| 66 | CONFIG_SPL_DM_REGULATOR_FIXED=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 67 | CONFIG_REGULATOR_RK8XX=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 68 | CONFIG_PWM_ROCKCHIP=y |
| 69 | CONFIG_SPL_RAM=y |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 70 | # CONFIG_RAM_ROCKCHIP_DEBUG is not set |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 71 | # CONFIG_RNG_SMCCC_TRNG is not set |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 72 | CONFIG_BAUDRATE=1500000 |
| 73 | CONFIG_DEBUG_UART_SHIFT=2 |
| 74 | CONFIG_SYS_NS16550_MEM32=y |
| 75 | CONFIG_SYSRESET=y |
Chris Morgan | 12b715b | 2023-05-15 11:00:31 -0500 | [diff] [blame] | 76 | CONFIG_VIDEO=y |
| 77 | CONFIG_VIDEO_ROCKCHIP=y |
| 78 | CONFIG_DISPLAY_ROCKCHIP_DW_MIPI=y |
| 79 | CONFIG_VIDEO_BRIDGE=y |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 80 | CONFIG_REGEX=y |
Chris Morgan | 61177be | 2024-02-05 12:58:54 -0600 | [diff] [blame] | 81 | # CONFIG_RSA is not set |
Chris Morgan | 6cf6fe2 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 82 | CONFIG_ERRNO_STR=y |
| 83 | # CONFIG_EFI_LOADER is not set |