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Sascha Hauercdace062008-03-26 20:40:49 +01001/*
2 * i2c driver for Freescale mx31
3 *
4 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
Stefano Babic1d549ad2011-01-20 07:50:44 +000026#include <asm/io.h>
Sascha Hauercdace062008-03-26 20:40:49 +010027
Michal Simeka4a549b2008-07-14 19:45:35 +020028#if defined(CONFIG_HARD_I2C)
Sascha Hauercdace062008-03-26 20:40:49 +010029
Liu Hui-R64343127cec12011-01-03 22:27:39 +000030#if defined(CONFIG_MX31)
Sascha Hauercdace062008-03-26 20:40:49 +010031#include <asm/arch/mx31.h>
32#include <asm/arch/mx31-regs.h>
Stefano Babic04220612011-01-19 22:46:26 +000033#else
34#include <asm/arch/imx-regs.h>
Liu Hui-R64343127cec12011-01-03 22:27:39 +000035#include <asm/arch/clock.h>
36#endif
Sascha Hauercdace062008-03-26 20:40:49 +010037
38#define IADR 0x00
39#define IFDR 0x04
40#define I2CR 0x08
41#define I2SR 0x0c
42#define I2DR 0x10
43
44#define I2CR_IEN (1 << 7)
45#define I2CR_IIEN (1 << 6)
46#define I2CR_MSTA (1 << 5)
47#define I2CR_MTX (1 << 4)
48#define I2CR_TX_NO_AK (1 << 3)
49#define I2CR_RSTA (1 << 2)
50
51#define I2SR_ICF (1 << 7)
52#define I2SR_IBB (1 << 5)
53#define I2SR_IIF (1 << 1)
54#define I2SR_RX_NO_AK (1 << 0)
55
Liu Hui-R64343127cec12011-01-03 22:27:39 +000056#if defined(CONFIG_SYS_I2C_MX31_PORT1)
Sascha Hauercdace062008-03-26 20:40:49 +010057#define I2C_BASE 0x43f80000
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010058#define I2C_CLK_OFFSET 26
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
Sascha Hauercdace062008-03-26 20:40:49 +010060#define I2C_BASE 0x43f98000
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010061#define I2C_CLK_OFFSET 28
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
Sascha Hauercdace062008-03-26 20:40:49 +010063#define I2C_BASE 0x43f84000
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +010064#define I2C_CLK_OFFSET 30
Liu Hui-R64343127cec12011-01-03 22:27:39 +000065#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
66#define I2C_BASE I2C1_BASE_ADDR
67#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
68#define I2C_BASE I2C2_BASE_ADDR
Stefano Babic04220612011-01-19 22:46:26 +000069#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
70#define I2C_BASE I2C_BASE_ADDR
Sascha Hauercdace062008-03-26 20:40:49 +010071#else
Stefano Babic04220612011-01-19 22:46:26 +000072#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
Sascha Hauercdace062008-03-26 20:40:49 +010073#endif
74
75#ifdef DEBUG
76#define DPRINTF(args...) printf(args)
77#else
78#define DPRINTF(args...)
79#endif
80
81static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
82 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
83 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
84
Stefano Babic1d549ad2011-01-20 07:50:44 +000085static inline void i2c_reset(void)
86{
87 writew(0, I2C_BASE + I2CR); /* Reset module */
88 writew(0, I2C_BASE + I2SR);
89 writew(I2CR_IEN, I2C_BASE + I2CR);
90}
91
Sascha Hauercdace062008-03-26 20:40:49 +010092void i2c_init(int speed, int unused)
93{
Liu Hui-R64343127cec12011-01-03 22:27:39 +000094 int freq;
Sascha Hauercdace062008-03-26 20:40:49 +010095 int i;
96
Liu Hui-R64343127cec12011-01-03 22:27:39 +000097#if defined(CONFIG_MX31)
Stefano Babic1d549ad2011-01-20 07:50:44 +000098 struct clock_control_regs *sc_regs =
99 (struct clock_control_regs *)CCM_BASE;
100
Liu Hui-R64343127cec12011-01-03 22:27:39 +0000101 freq = mx31_get_ipg_clk();
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +0100102 /* start the required I2C clock */
Stefano Babic1d549ad2011-01-20 07:50:44 +0000103 writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
104 &sc_regs->cgr0);
Liu Hui-R64343127cec12011-01-03 22:27:39 +0000105#else
106 freq = mxc_get_clock(MXC_IPG_PERCLK);
107#endif
Guennadi Liakhovetskie7de18a2009-02-13 09:23:36 +0100108
Sascha Hauercdace062008-03-26 20:40:49 +0100109 for (i = 0; i < 0x1f; i++)
110 if (freq / div[i] <= speed)
111 break;
112
Stefano Babic1d549ad2011-01-20 07:50:44 +0000113 debug("%s: speed: %d\n", __func__, speed);
Sascha Hauercdace062008-03-26 20:40:49 +0100114
Stefano Babic1d549ad2011-01-20 07:50:44 +0000115 writew(i, I2C_BASE + IFDR);
116 i2c_reset();
Sascha Hauercdace062008-03-26 20:40:49 +0100117}
118
119static int wait_busy(void)
120{
121 int timeout = 10000;
122
Stefano Babic1d549ad2011-01-20 07:50:44 +0000123 while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout)
Sascha Hauercdace062008-03-26 20:40:49 +0100124 udelay(1);
Stefano Babic1d549ad2011-01-20 07:50:44 +0000125 writew(0, I2C_BASE + I2SR); /* clear interrupt */
Sascha Hauercdace062008-03-26 20:40:49 +0100126
127 return timeout;
128}
129
130static int tx_byte(u8 byte)
131{
Stefano Babic1d549ad2011-01-20 07:50:44 +0000132 writew(byte, I2C_BASE + I2DR);
Sascha Hauercdace062008-03-26 20:40:49 +0100133
Stefano Babic1d549ad2011-01-20 07:50:44 +0000134 if (!wait_busy() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)
Sascha Hauercdace062008-03-26 20:40:49 +0100135 return -1;
136 return 0;
137}
138
139static int rx_byte(void)
140{
141 if (!wait_busy())
142 return -1;
143
Stefano Babic1d549ad2011-01-20 07:50:44 +0000144 return readw(I2C_BASE + I2DR);
Sascha Hauercdace062008-03-26 20:40:49 +0100145}
146
147int i2c_probe(uchar chip)
148{
149 int ret;
150
Stefano Babic1d549ad2011-01-20 07:50:44 +0000151 writew(0, I2C_BASE + I2CR); /* Reset module */
152 writew(I2CR_IEN, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100153
Stefano Babic1d549ad2011-01-20 07:50:44 +0000154 writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100155 ret = tx_byte(chip << 1);
Stefano Babic1d549ad2011-01-20 07:50:44 +0000156 writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100157
158 return ret;
159}
160
161static int i2c_addr(uchar chip, uint addr, int alen)
162{
Stefano Babic1d549ad2011-01-20 07:50:44 +0000163 writew(0, I2C_BASE + I2SR);
164 writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100165
166 if (tx_byte(chip << 1))
167 return -1;
168
169 while (alen--)
170 if (tx_byte((addr >> (alen * 8)) & 0xff))
171 return -1;
172 return 0;
173}
174
175int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
176{
177 int timeout = 10000;
178 int ret;
179
Stefano Babic1d549ad2011-01-20 07:50:44 +0000180 debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
181 __func__, chip, addr, alen, len);
Sascha Hauercdace062008-03-26 20:40:49 +0100182
183 if (i2c_addr(chip, addr, alen)) {
184 printf("i2c_addr failed\n");
185 return -1;
186 }
187
Stefano Babic1d549ad2011-01-20 07:50:44 +0000188 writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100189
190 if (tx_byte(chip << 1 | 1))
191 return -1;
192
Stefano Babic1d549ad2011-01-20 07:50:44 +0000193 writew(I2CR_IEN | I2CR_MSTA |
194 ((len == 1) ? I2CR_TX_NO_AK : 0),
195 I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100196
Stefano Babic1d549ad2011-01-20 07:50:44 +0000197 ret = readw(I2C_BASE + I2DR);
Sascha Hauercdace062008-03-26 20:40:49 +0100198
199 while (len--) {
200 if ((ret = rx_byte()) < 0)
201 return -1;
202 *buf++ = ret;
203 if (len <= 1)
Stefano Babic1d549ad2011-01-20 07:50:44 +0000204 writew(I2CR_IEN | I2CR_MSTA |
205 I2CR_TX_NO_AK,
206 I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100207 }
208
209 wait_busy();
210
Stefano Babic1d549ad2011-01-20 07:50:44 +0000211 writew(I2CR_IEN, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100212
Stefano Babic1d549ad2011-01-20 07:50:44 +0000213 while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
Sascha Hauercdace062008-03-26 20:40:49 +0100214 udelay(1);
215
216 return 0;
217}
218
219int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
220{
Stefano Babic1d549ad2011-01-20 07:50:44 +0000221 int timeout = I2C_MAX_TIMEOUT;
222 debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
223 __func__, chip, addr, alen, len);
Sascha Hauercdace062008-03-26 20:40:49 +0100224
225 if (i2c_addr(chip, addr, alen))
226 return -1;
227
228 while (len--)
229 if (tx_byte(*buf++))
230 return -1;
231
Stefano Babic1d549ad2011-01-20 07:50:44 +0000232 writew(I2CR_IEN, I2C_BASE + I2CR);
Sascha Hauercdace062008-03-26 20:40:49 +0100233
Stefano Babic1d549ad2011-01-20 07:50:44 +0000234 while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout)
Sascha Hauercdace062008-03-26 20:40:49 +0100235 udelay(1);
236
237 return 0;
238}
239
240#endif /* CONFIG_HARD_I2C */