blob: d544ffb5ffb6483c16fb33681350477f81b85cf1 [file] [log] [blame]
Jason Jinece92f82007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jinece92f82007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala4c2e3da2009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jinece92f82007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jinece92f82007-07-06 08:34:56 +080036*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jinece92f82007-07-06 08:34:56 +080040*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jinece92f82007-07-06 08:34:56 +080043*
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jinece92f82007-07-06 08:34:56 +080047****************************************************************************/
Simon Glass401d1c42020-10-30 21:38:53 -060048#include <compiler.h>
Simon Glass4c59f952014-11-14 20:56:40 -070049#include <bios_emul.h>
50#include <errno.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060051#include <log.h>
Jason Jinece92f82007-07-06 08:34:56 +080052#include <malloc.h>
Simon Glasscafe8712022-07-30 15:52:04 -060053#include <vesa.h>
Simon Glassc05ed002020-05-10 11:40:11 -060054#include <linux/delay.h>
Simon Glass4c59f952014-11-14 20:56:40 -070055#include "biosemui.h"
Jason Jinece92f82007-07-06 08:34:56 +080056
57/* Length of the BIOS image */
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +020058#define MAX_BIOSLEN (128 * 1024L)
Jason Jinece92f82007-07-06 08:34:56 +080059
Jason Jinece92f82007-07-06 08:34:56 +080060/* Place to save PCI BAR's that we change and later restore */
61static u32 saveROMBaseAddress;
62static u32 saveBaseAddress10;
63static u32 saveBaseAddress14;
64static u32 saveBaseAddress18;
65static u32 saveBaseAddress20;
66
Simon Glass222f25f2014-12-29 19:32:26 -070067/* Addres im memory of VBE region */
68const int vbe_offset = 0x2000;
69
Bin Mengca5eb0c2018-04-11 22:02:15 -070070#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glass222f25f2014-12-29 19:32:26 -070071static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
72 u32 x86_dword_ptr)
Simon Glass4c59f952014-11-14 20:56:40 -070073{
Simon Glass222f25f2014-12-29 19:32:26 -070074 u32 seg_ofs, flat;
75
76 seg_ofs = le32_to_cpu(x86_dword_ptr);
77 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
78 if (flat >= 0xc0000)
79 return vga_info->BIOSImage + flat - 0xc0000;
80 else
81 return buf + (flat - vbe_offset);
82}
83
84static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
Simon Glassda62e1e2022-07-30 15:52:05 -060085 int vesa_mode, struct vesa_state *mode_info)
Simon Glass222f25f2014-12-29 19:32:26 -070086{
87 void *buffer = (void *)(M.mem_base + vbe_offset);
88 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
89 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
90 struct vesa_mode_info *vm;
Simon Glassda62e1e2022-07-30 15:52:05 -060091 struct vesa_bios_ext_info *info;
Simon Glass222f25f2014-12-29 19:32:26 -070092 const u16 *modes_bios, *ptr;
93 u16 *modes;
94 int size;
95
96 debug("VBE: Getting information\n");
97 regs->e.eax = VESA_GET_INFO;
98 regs->e.esi = buffer_seg;
99 regs->e.edi = buffer_adr;
100 info = buffer;
101 memset(info, '\0', sizeof(*info));
102 strcpy(info->signature, "VBE2");
103 BE_int86(0x10, regs, regs);
104 if (regs->e.eax != 0x4f) {
105 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
106 return -ENOSYS;
107 }
108 debug("version %x\n", le16_to_cpu(info->version));
109 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
110 info->oem_string_ptr));
111 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
112 info->vendor_name_ptr));
113 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
114 info->product_name_ptr));
115 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
116 info->product_rev_ptr));
117 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
118 debug("Modes: ");
119 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
120 debug("%x ", le16_to_cpu(*ptr));
121 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
122 size = (ptr - modes_bios) * sizeof(u16) + 2;
123 modes = malloc(size);
124 if (!modes)
125 return -ENOMEM;
126 memcpy(modes, modes_bios, size);
127
128 regs->e.eax = VESA_GET_CUR_MODE;
129 BE_int86(0x10, regs, regs);
130 if (regs->e.eax != 0x4f) {
131 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
132 return -ENOSYS;
133 }
134 debug("Current mode %x\n", regs->e.ebx);
135
136 for (ptr = modes; *ptr != 0xffff; ptr++) {
137 int mode = le16_to_cpu(*ptr);
138 bool linear_ok;
139 int attr;
140
Simon Glass222f25f2014-12-29 19:32:26 -0700141 debug("Mode %x: ", mode);
Simon Glassda62e1e2022-07-30 15:52:05 -0600142 memset(buffer, '\0', sizeof(struct vesa_state));
Simon Glass222f25f2014-12-29 19:32:26 -0700143 regs->e.eax = VESA_GET_MODE_INFO;
144 regs->e.ebx = 0;
145 regs->e.ecx = mode;
146 regs->e.edx = 0;
147 regs->e.esi = buffer_seg;
148 regs->e.edi = buffer_adr;
149 BE_int86(0x10, regs, regs);
150 if (regs->e.eax != 0x4f) {
151 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
152 continue;
153 }
154 memcpy(mode_info->mode_info_block, buffer,
155 sizeof(struct vesa_mode_info));
156 mode_info->valid = true;
157 vm = &mode_info->vesa;
158 attr = le16_to_cpu(vm->mode_attributes);
159 linear_ok = attr & 0x80;
160 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
161 le16_to_cpu(vm->x_resolution),
162 le16_to_cpu(vm->y_resolution),
163 vm->bits_per_pixel, vm->memory_model,
164 linear_ok ? "OK" : "not available",
165 attr);
166 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
167 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
168 vm->red_mask_size, vm->green_mask_size,
169 vm->blue_mask_size);
170 }
171
172 return 0;
173}
174
175static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
Simon Glassda62e1e2022-07-30 15:52:05 -0600176 struct vesa_state *mode_info)
Simon Glass222f25f2014-12-29 19:32:26 -0700177{
178 void *buffer = (void *)(M.mem_base + vbe_offset);
179 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
180 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
181 struct vesa_mode_info *vm;
182
Simon Glass4c59f952014-11-14 20:56:40 -0700183 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700184 regs->e.eax = VESA_SET_MODE;
185 regs->e.ebx = vesa_mode;
Simon Glass222f25f2014-12-29 19:32:26 -0700186 /* request linear framebuffer mode and don't clear display */
187 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glass4c59f952014-11-14 20:56:40 -0700188 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700189 if (regs->e.eax != 0x4f) {
190 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
191 return -ENOSYS;
192 }
Simon Glass4c59f952014-11-14 20:56:40 -0700193
Simon Glassda62e1e2022-07-30 15:52:05 -0600194 memset(buffer, '\0', sizeof(struct vesa_state));
Simon Glass222f25f2014-12-29 19:32:26 -0700195 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glass4c59f952014-11-14 20:56:40 -0700196 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glass4c59f952014-11-14 20:56:40 -0700197 regs->e.ecx = vesa_mode;
Simon Glass4c59f952014-11-14 20:56:40 -0700198 regs->e.esi = buffer_seg;
199 regs->e.edi = buffer_adr;
200 BE_int86(0x10, regs, regs);
Simon Glass222f25f2014-12-29 19:32:26 -0700201 if (regs->e.eax != 0x4f) {
202 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
203 return -ENOSYS;
204 }
Simon Glass4c59f952014-11-14 20:56:40 -0700205
Simon Glass222f25f2014-12-29 19:32:26 -0700206 memcpy(mode_info->mode_info_block, buffer,
207 sizeof(struct vesa_mode_info));
208 mode_info->valid = true;
209 mode_info->video_mode = vesa_mode;
210 vm = &mode_info->vesa;
211 vm->x_resolution = le16_to_cpu(vm->x_resolution);
212 vm->y_resolution = le16_to_cpu(vm->y_resolution);
213 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
214 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
215 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
216 debug("VBE: Init complete\n");
217
218 return 0;
Simon Glass4c59f952014-11-14 20:56:40 -0700219}
Bin Mengca5eb0c2018-04-11 22:02:15 -0700220#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
Simon Glass4c59f952014-11-14 20:56:40 -0700221
Jason Jinece92f82007-07-06 08:34:56 +0800222/****************************************************************************
223PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200224pcidev - PCI device info for the video card on the bus to boot
Simon Glass4c59f952014-11-14 20:56:40 -0700225vga_info - BIOS emulator VGA info structure
Jason Jinece92f82007-07-06 08:34:56 +0800226
227REMARKS:
228This function executes the BIOS POST code on the controller. We assume that
229at this stage the controller has its I/O and memory space enabled and
230that all other controllers are in a disabled state.
231****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700232static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
Simon Glassda62e1e2022-07-30 15:52:05 -0600233 int vesa_mode, struct vesa_state *mode_info)
Jason Jinece92f82007-07-06 08:34:56 +0800234{
235 RMREGS regs;
236 RMSREGS sregs;
Simon Glass72826722016-01-17 16:11:09 -0700237 pci_dev_t bdf;
Jason Jinece92f82007-07-06 08:34:56 +0800238
239 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
240 AH must contain the bus and AL must contain the devfn, encoded as
241 (dev << 3) | fn
242 */
243 memset(&regs, 0, sizeof(regs));
244 memset(&sregs, 0, sizeof(sregs));
Simon Glass72826722016-01-17 16:11:09 -0700245 bdf = dm_pci_get_bdf(pcidev);
246 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
247 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
Jason Jinece92f82007-07-06 08:34:56 +0800248 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glass4c59f952014-11-14 20:56:40 -0700249 BE_setVGA(vga_info);
Jason Jinece92f82007-07-06 08:34:56 +0800250
251 /*Execute the BIOS POST code*/
252 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
253
254 /*Cleanup and exit*/
Simon Glass4c59f952014-11-14 20:56:40 -0700255 BE_getVGA(vga_info);
256
Bin Mengca5eb0c2018-04-11 22:02:15 -0700257#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glass222f25f2014-12-29 19:32:26 -0700258 /* Useful for debugging */
259 if (0)
260 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glass4c59f952014-11-14 20:56:40 -0700261 if (vesa_mode != -1)
262 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Bin Mengca5eb0c2018-04-11 22:02:15 -0700263#endif
Jason Jinece92f82007-07-06 08:34:56 +0800264}
265
266/****************************************************************************
267PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200268pcidev - PCI device info for the video card on the bus
269bar - Place to return the base address register offset to use
Jason Jinece92f82007-07-06 08:34:56 +0800270
271RETURNS:
272The address to use to map the secondary BIOS (AGP devices)
273
274REMARKS:
275Searches all the PCI base address registers for the device looking for a
276memory mapping that is large enough to hold our ROM BIOS. We usually end up
277finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
278to map the BIOS for the device into. We use a mapping that is already
279assigned to the device to ensure the memory range will be passed through
280by any PCI->PCI or AGP->PCI bridge that may be present.
281
282NOTE: Usually this function is only used for AGP devices, but it may be
283 used for PCI devices that have already been POST'ed and the BIOS
284 ROM base address has been zero'ed out.
285
286NOTE: This function leaves the original memory aperture disabled by leaving
287 it programmed to all 1's. It must be restored to the correct value
288 later.
289****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700290static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
Jason Jinece92f82007-07-06 08:34:56 +0800291{
292 u32 base, size;
293
294 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
Simon Glass72826722016-01-17 16:11:09 -0700295 dm_pci_read_config32(pcidev, *bar, &base);
Jason Jinece92f82007-07-06 08:34:56 +0800296 if (!(base & 0x1)) {
Simon Glass72826722016-01-17 16:11:09 -0700297 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
298 dm_pci_read_config32(pcidev, *bar, &size);
Jason Jinece92f82007-07-06 08:34:56 +0800299 size = ~(size & ~0xFF) + 1;
300 if (size >= MAX_BIOSLEN)
301 return base & ~0xFF;
302 }
303 }
304 return 0;
305}
306
307/****************************************************************************
308REMARKS:
309Some non-x86 Linux kernels map PCI relocateable I/O to values that
310are above 64K, which will not work with the BIOS image that requires
311the offset for the I/O ports to be a maximum of 16-bits. Ideally
312someone should fix the kernel to map the I/O ports for VGA compatible
313devices to a different location (or just all I/O ports since it is
314unlikely you can have enough devices in the machine to use up all
31564K of the I/O space - a total of more than 256 cards would be
316necessary).
317
318Anyway to fix this we change all I/O mapped base registers and
319chop off the top bits.
320****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700321static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
Jason Jinece92f82007-07-06 08:34:56 +0800322{
323 if ((*base & 0x1) && (*base > 0xFFFE)) {
324 *base &= 0xFFFF;
Simon Glass72826722016-01-17 16:11:09 -0700325 dm_pci_write_config32(pcidev, reg, *base);
Jason Jinece92f82007-07-06 08:34:56 +0800326
327 }
328}
329
330/****************************************************************************
331PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200332pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800333
334RETURNS:
335Pointers to the mapped BIOS image
336
337REMARKS:
338Maps a pointer to the BIOS image on the graphics card on the PCI bus.
339****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700340void *PCI_mapBIOSImage(struct udevice *pcidev)
Jason Jinece92f82007-07-06 08:34:56 +0800341{
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500342 u32 BIOSImageBus;
Jason Jinece92f82007-07-06 08:34:56 +0800343 int BIOSImageBAR;
344 u8 *BIOSImage;
345
346 /*Save PCI BAR registers that might get changed*/
Simon Glass72826722016-01-17 16:11:09 -0700347 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
348 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
349 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
350 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
351 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
Jason Jinece92f82007-07-06 08:34:56 +0800352
353 /*Fix up I/O base registers to less than 64K */
354 if(saveBaseAddress14 != 0)
355 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
356 else
357 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
358
359 /* Some cards have problems that stop us from being able to read the
360 BIOS image from the ROM BAR. To fix this we have to do some chipset
361 specific programming for different cards to solve this problem.
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200362 */
Jason Jinece92f82007-07-06 08:34:56 +0800363
Ed Swarthoutf6a7a2e2010-03-31 15:52:40 -0500364 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
365 if (BIOSImageBus == 0) {
Jason Jinece92f82007-07-06 08:34:56 +0800366 printf("Find bios addr error\n");
367 return NULL;
368 }
369
Andrew Sculla822d1d2022-04-21 16:11:12 +0000370 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus, 0, PCI_REGION_TYPE,
371 PCI_REGION_MEM, MAP_NOCACHE);
Simon Glass72826722016-01-17 16:11:09 -0700372
373 /*Change the PCI BAR registers to map it onto the bus.*/
374 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
375 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Jason Jinece92f82007-07-06 08:34:56 +0800376 udelay(1);
377
378 /*Check that the BIOS image is valid. If not fail, or return the
379 compiled in BIOS image if that option was enabled
380 */
381 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
382 return NULL;
383 }
384
385 return BIOSImage;
386}
387
388/****************************************************************************
389PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200390pcidev - PCI device info for the video card on the bus
Jason Jinece92f82007-07-06 08:34:56 +0800391
392REMARKS:
393Unmaps the BIOS image for the device and restores framebuffer mappings
394****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700395void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
396{
397 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
398 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
399 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
400 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
401 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
402}
Jason Jinece92f82007-07-06 08:34:56 +0800403
404/****************************************************************************
405PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200406pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800407VGAInfo - BIOS emulator VGA info structure
408
409RETURNS:
York Sun472d5462013-04-01 11:29:11 -0700410true if successfully initialised, false if not.
Jason Jinece92f82007-07-06 08:34:56 +0800411
412REMARKS:
413Loads and POST's the display controllers BIOS, directly from the BIOS
414image we can extract over the PCI bus.
415****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700416static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
417 int bios_len, BE_VGAInfo *vga_info,
Simon Glassda62e1e2022-07-30 15:52:05 -0600418 int vesa_mode, struct vesa_state *mode_info)
Jason Jinece92f82007-07-06 08:34:56 +0800419{
Simon Glass4c59f952014-11-14 20:56:40 -0700420 u32 bios_image_len;
421 uchar *mapped_bios;
422 uchar *copy_of_bios;
Simon Glass72826722016-01-17 16:11:09 -0700423 pci_dev_t bdf;
Jason Jinece92f82007-07-06 08:34:56 +0800424
Simon Glass4c59f952014-11-14 20:56:40 -0700425 if (bios_rom) {
426 copy_of_bios = bios_rom;
427 bios_image_len = bios_len;
428 } else {
429 /*
430 * Allocate memory to store copy of BIOS from display
431 * controller
432 */
433 mapped_bios = PCI_mapBIOSImage(pcidev);
434 if (mapped_bios == NULL) {
435 printf("videoboot: Video ROM failed to map!\n");
436 return false;
437 }
438
439 bios_image_len = mapped_bios[2] * 512;
440
441 copy_of_bios = malloc(bios_image_len);
442 if (copy_of_bios == NULL) {
443 printf("videoboot: Out of memory!\n");
444 return false;
445 }
446 memcpy(copy_of_bios, mapped_bios, bios_image_len);
447 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jinece92f82007-07-06 08:34:56 +0800448 }
449
Simon Glass4c59f952014-11-14 20:56:40 -0700450 /*Save information in vga_info structure*/
Simon Glass72826722016-01-17 16:11:09 -0700451 bdf = dm_pci_get_bdf(pcidev);
452 vga_info->function = PCI_FUNC(bdf);
453 vga_info->device = PCI_DEV(bdf);
454 vga_info->bus = PCI_BUS(bdf);
Simon Glass4c59f952014-11-14 20:56:40 -0700455 vga_info->pcidev = pcidev;
456 vga_info->BIOSImage = copy_of_bios;
457 vga_info->BIOSImageLen = bios_image_len;
Jason Jinece92f82007-07-06 08:34:56 +0800458
459 /*Now execute the BIOS POST for the device*/
Simon Glass4c59f952014-11-14 20:56:40 -0700460 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jinece92f82007-07-06 08:34:56 +0800461 printf("videoboot: Video ROM image is invalid!\n");
462 return false;
463 }
464
Simon Glass4c59f952014-11-14 20:56:40 -0700465 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jinece92f82007-07-06 08:34:56 +0800466
467 /*Reset the size of the BIOS image to the final size*/
Simon Glass4c59f952014-11-14 20:56:40 -0700468 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jinece92f82007-07-06 08:34:56 +0800469 return true;
470}
471
Simon Glass72826722016-01-17 16:11:09 -0700472int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
Simon Glass4c59f952014-11-14 20:56:40 -0700473{
474 BE_VGAInfo *VGAInfo;
Simon Glass72826722016-01-17 16:11:09 -0700475 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
Simon Glass4c59f952014-11-14 20:56:40 -0700476
477 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
Simon Glass72826722016-01-17 16:11:09 -0700478 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
Simon Glass4c59f952014-11-14 20:56:40 -0700479 /*Initialise the x86 BIOS emulator*/
480 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
481 printf("videoboot: Out of memory!\n");
482 return -ENOMEM;
483 }
484 memset(VGAInfo, 0, sizeof(*VGAInfo));
485 BE_init(0, 65536, VGAInfo, 0);
486 *vga_infop = VGAInfo;
487
488 return 0;
489}
490
491void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
492{
493 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
494}
495
Simon Glass72826722016-01-17 16:11:09 -0700496int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
497 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
Simon Glassda62e1e2022-07-30 15:52:05 -0600498 struct vesa_state *mode_info)
Simon Glass4c59f952014-11-14 20:56:40 -0700499{
500 /*Post all the display controller BIOS'es*/
501 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
502 vesa_mode, mode_info))
503 return -EINVAL;
504
505 /*
506 * Cleanup and exit the emulator if requested. If the BIOS emulator
507 * is needed after booting the card, we will not call BE_exit and
508 * leave it enabled for further use (ie: VESA driver etc).
509 */
510 if (clean_up) {
511 BE_exit();
Bin Meng6e7b5f22015-04-24 15:48:05 +0800512 if (vga_info->BIOSImage &&
Simon Glass2cd11a22016-09-25 21:33:06 -0600513 (ulong)(vga_info->BIOSImage) != 0xc0000)
Simon Glass4c59f952014-11-14 20:56:40 -0700514 free(vga_info->BIOSImage);
515 free(vga_info);
Simon Glass4c59f952014-11-14 20:56:40 -0700516 }
517
518 return 0;
519}
520
Jason Jinece92f82007-07-06 08:34:56 +0800521/****************************************************************************
522PARAMETERS:
Wolfgang Denk9c7e4b02007-08-06 02:17:36 +0200523pcidev - PCI device info for the video card on the bus to boot
Jason Jinece92f82007-07-06 08:34:56 +0800524pVGAInfo - Place to return VGA info structure is requested
York Sun472d5462013-04-01 11:29:11 -0700525cleanUp - true to clean up on exit, false to leave emulator active
Jason Jinece92f82007-07-06 08:34:56 +0800526
527REMARKS:
528Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
529and the X86 BIOS emulator module.
530****************************************************************************/
Simon Glass72826722016-01-17 16:11:09 -0700531int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
532 int clean_up)
Jason Jinece92f82007-07-06 08:34:56 +0800533{
534 BE_VGAInfo *VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700535 int ret;
Jason Jinece92f82007-07-06 08:34:56 +0800536
Simon Glass4c59f952014-11-14 20:56:40 -0700537 ret = biosemu_setup(pcidev, &VGAInfo);
538 if (ret)
Jason Jinece92f82007-07-06 08:34:56 +0800539 return false;
Simon Glass4c59f952014-11-14 20:56:40 -0700540 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
541 if (ret)
Ed Swarthout9624f6d2010-03-31 09:54:28 -0500542 return false;
Jason Jinece92f82007-07-06 08:34:56 +0800543
Simon Glass4c59f952014-11-14 20:56:40 -0700544 /* Return VGA info pointer if the caller requested it*/
Jason Jinece92f82007-07-06 08:34:56 +0800545 if (pVGAInfo)
546 *pVGAInfo = VGAInfo;
Simon Glass4c59f952014-11-14 20:56:40 -0700547
Jason Jinece92f82007-07-06 08:34:56 +0800548 return true;
549}