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wdenk7a8e9bed2003-05-31 18:35:21 +00001/*
2 * (C) Copyright 2002
3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
wdenk8bde7f72003-06-27 21:31:46 +000024#include <common.h>
25#include <pci.h>
26#include <asm/io.h>
27#include <asm/pci.h>
wdenk7a8e9bed2003-05-31 18:35:21 +000028
wdenk7a8e9bed2003-05-31 18:35:21 +000029#undef PCI_ROM_SCAN_VERBOSE
30
wdenk8bde7f72003-06-27 21:31:46 +000031int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
wdenk7a8e9bed2003-05-31 18:35:21 +000032{
33 struct pci_controller *hose;
34 int res = -1;
35 int i;
wdenk8bde7f72003-06-27 21:31:46 +000036
wdenk7a8e9bed2003-05-31 18:35:21 +000037 u32 rom_addr;
38 u32 addr_reg;
39 u32 size;
wdenk8bde7f72003-06-27 21:31:46 +000040
wdenk7a8e9bed2003-05-31 18:35:21 +000041 u16 vendor;
42 u16 device;
43 u32 class_code;
44
45 hose = pci_bus_to_hose(PCI_BUS(dev));
46#if 0
47 printf("pci_shadow_rom() asked to shadow device %x to %x\n",
48 dev, (u32)dest);
wdenk8bde7f72003-06-27 21:31:46 +000049#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000050 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
51 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
52 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
wdenk8bde7f72003-06-27 21:31:46 +000053
Wolfgang Denk53677ef2008-05-20 16:00:29 +020054 class_code &= 0xffffff00;
wdenk7a8e9bed2003-05-31 18:35:21 +000055 class_code >>= 8;
56
wdenk8bde7f72003-06-27 21:31:46 +000057#if 0
wdenk7a8e9bed2003-05-31 18:35:21 +000058 printf("PCI Header Vendor %04x device %04x class %06x\n",
59 vendor, device, class_code);
wdenk8bde7f72003-06-27 21:31:46 +000060#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000061 /* Enable the rom addess decoder */
Graeme Russd7549022009-08-23 12:59:50 +100062 pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
wdenk7a8e9bed2003-05-31 18:35:21 +000063 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
64
65 if (!addr_reg) {
66 /* register unimplemented */
67 printf("pci_chadow_rom: device do not seem to have a rom\n");
68 return -1;
69 }
wdenk8bde7f72003-06-27 21:31:46 +000070
71 size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1;
72
73#if 0
wdenk7a8e9bed2003-05-31 18:35:21 +000074 printf("ROM is %d bytes\n", size);
wdenk8bde7f72003-06-27 21:31:46 +000075#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000076 rom_addr = pci_get_rom_window(hose, size);
wdenk8bde7f72003-06-27 21:31:46 +000077#if 0
wdenk7a8e9bed2003-05-31 18:35:21 +000078 printf("ROM mapped at %x \n", rom_addr);
wdenk8bde7f72003-06-27 21:31:46 +000079#endif
80 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
wdenk7a8e9bed2003-05-31 18:35:21 +000081 pci_phys_to_mem(dev, rom_addr)
82 |PCI_ROM_ADDRESS_ENABLE);
83
84
wdenk7a8e9bed2003-05-31 18:35:21 +000085 for (i=rom_addr;i<rom_addr+size; i+=512) {
wdenk8bde7f72003-06-27 21:31:46 +000086
87
wdenk7a8e9bed2003-05-31 18:35:21 +000088 if (readw(i) == 0xaa55) {
89 u32 pci_data;
90#ifdef PCI_ROM_SCAN_VERBOSE
91 printf("ROM signature found\n");
wdenk8bde7f72003-06-27 21:31:46 +000092#endif
wdenk7a8e9bed2003-05-31 18:35:21 +000093 pci_data = readw(0x18+i);
94 pci_data += i;
wdenk8bde7f72003-06-27 21:31:46 +000095
wdenk7a8e9bed2003-05-31 18:35:21 +000096 if (0==memcmp((void*)pci_data, "PCIR", 4)) {
wdenk8bde7f72003-06-27 21:31:46 +000097#ifdef PCI_ROM_SCAN_VERBOSE
wdenk7a8e9bed2003-05-31 18:35:21 +000098 printf("Fount PCI rom image at offset %d\n", i-rom_addr);
99 printf("Vendor %04x device %04x class %06x\n",
100 readw(pci_data+4), readw(pci_data+6),
101 readl(pci_data+0x0d)&0xffffff);
wdenk8bde7f72003-06-27 21:31:46 +0000102 printf("%s\n",
wdenk7a8e9bed2003-05-31 18:35:21 +0000103 (readw(pci_data+0x15) &0x80)?
104 "Last image":"More images follow");
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200105 switch (readb(pci_data+0x14)) {
wdenk7a8e9bed2003-05-31 18:35:21 +0000106 case 0:
107 printf("X86 code\n");
108 break;
109 case 1:
110 printf("Openfirmware code\n");
111 break;
112 case 2:
113 printf("PARISC code\n");
114 break;
115 }
116 printf("Image size %d\n", readw(pci_data+0x10) * 512);
wdenk8bde7f72003-06-27 21:31:46 +0000117#endif
wdenk7a8e9bed2003-05-31 18:35:21 +0000118 /* FixMe: I think we should compare the class code
119 * bytes as well but I have no reference on the
120 * exact order of these bytes in the PCI ROM header */
wdenk8bde7f72003-06-27 21:31:46 +0000121 if (readw(pci_data+4) == vendor &&
wdenk7a8e9bed2003-05-31 18:35:21 +0000122 readw(pci_data+6) == device &&
123 /* (readl(pci_data+0x0d)&0xffffff) == class_code && */
124 readb(pci_data+0x14) == 0 /* x86 code image */ ) {
wdenk8bde7f72003-06-27 21:31:46 +0000125#ifdef PCI_ROM_SCAN_VERBOSE
wdenk7a8e9bed2003-05-31 18:35:21 +0000126 printf("Suitable ROM image found, copying\n");
wdenk8bde7f72003-06-27 21:31:46 +0000127#endif
wdenk7a8e9bed2003-05-31 18:35:21 +0000128 memmove(dest, (void*)rom_addr, readw(pci_data+0x10) * 512);
129 res = 0;
130 break;
wdenk8bde7f72003-06-27 21:31:46 +0000131
wdenk7a8e9bed2003-05-31 18:35:21 +0000132 }
133 if (readw(pci_data+0x15) &0x80) {
134 break;
135 }
136 }
137 }
wdenk8bde7f72003-06-27 21:31:46 +0000138
wdenk7a8e9bed2003-05-31 18:35:21 +0000139 }
wdenk8bde7f72003-06-27 21:31:46 +0000140
wdenk7a8e9bed2003-05-31 18:35:21 +0000141#ifdef PCI_ROM_SCAN_VERBOSE
142 if (res) {
143 printf("No suitable image found\n");
144 }
wdenk8bde7f72003-06-27 21:31:46 +0000145#endif
wdenk7a8e9bed2003-05-31 18:35:21 +0000146 /* disable PAR register and PCI device ROM address devocer */
147 pci_remove_rom_window(hose, rom_addr);
wdenk8bde7f72003-06-27 21:31:46 +0000148
wdenk7a8e9bed2003-05-31 18:35:21 +0000149 pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
150
151 return res;
152}