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gerrit.cesnet.cz / github / trini / u-boot / 1ab70f6fff9fa3b7910c11b874f625e004256c50 / . / board / dave / B2 / B2.c
blob: 096ebbd16c84e0b2dd18d0270745bd1ba0c3b485 [file] [log] [blame]
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]1/*
2 * (C) Copyright 2004
3 * DAVE Srl
4 * http://www.dave-tech.it
5 * http://www.wawnet.biz
6 * mailto:info@wawnet.biz
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <common.h>
Ben Warren1ab70f62009-12-14 16:30:39 -0800[diff] [blame^]28#include <netdev.h>
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]29#include <asm/hardware.h>
30
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200[diff] [blame]31DECLARE_GLOBAL_DATA_PTR;
32
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]33/*
34 * Miscelaneous platform dependent initialization
35 */
36
37int board_init (void)
38{
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]39 u32 temp;
40
41 /* Configuration Port Control Register*/
42 /* Port A */
43 PCONA = 0x3ff;
44
45 /* Port B */
46 PCONB = 0xff;
47 PDATB = 0xFFFF;
48
49 /* Port C */
50 /*
51 PCONC = 0xff55ff15;
52 PDATC = 0x0;
53 PUPC = 0xffff;
54 */
55
56 /* Port D */
57 /*
58 PCOND = 0xaaaa;
59 PUPD = 0xff;
60 */
61
62 /* Port E */
63 PCONE = 0x0001aaa9;
64 PDATE = 0x0;
65 PUPE = 0xff;
66
67 /* Port F */
68 PCONF = 0x124955;
69 PDATF = 0xff; /* B2-eth_reset tied high level */
70 /*
71 PUPF = 0x1e3;
72 */
73
74 /* Port G */
75 PUPG = 0x1;
76 PCONG = 0x3; /*PG0= EINT0= ETH_INT prepared for linux kernel*/
77
78 INTMSK = 0x03fffeff;
79 INTCON = 0x05;
80
81 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200[diff] [blame]82 Configure chip ethernet interrupt as High level
83 Port G EINT 0-7 EINT0 -> CHIP ETHERNET
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]84 */
85 temp = EXTINT;
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200[diff] [blame]86 temp &= ~0x7;
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]87 temp |= 0x1; /*LEVEL_HIGH*/
88 EXTINT = temp;
89
90 /*
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200[diff] [blame]91 Reset SMSC LAN91C96 chip
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]92 */
93 temp= PCONF;
94 temp |= 0x00000040;
95 PCONF = temp;
96
97 /* Reset high */
98 temp = PDATF;
99 temp |= (1 << 3);
100 PDATF = temp;
101
102 /* Short delay */
103 for (temp=0;temp<10;temp++)
104 {
105 /* NOP */
106 }
107
108 /* Reset low */
109 temp = PDATF;
110 temp &= ~(1 << 3);
111 PDATF = temp;
112
113 /* arch number MACH_TYPE_MBA44B0 */
wdenk731215e2004-10-10 18:41:04 +0000[diff] [blame]114 gd->bd->bi_arch_number = MACH_TYPE_S3C44B0;
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]115
116 /* location of boot parameters */
117 gd->bd->bi_boot_params = 0x0c000100;
118
119 return 0;
120}
121
122int dram_init (void)
123{
wdenk5cfbab32004-02-24 02:01:43 +0000[diff] [blame]124 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
125 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
126
127 return (0);
128}
Ben Warren1ab70f62009-12-14 16:30:39 -0800[diff] [blame^]129
130#ifdef CONFIG_CMD_NET
131int board_eth_init(bd_t *bis)
132{
133 int rc = 0;
134#ifdef CONFIG_LAN91C96
135 rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
136#endif
137 return rc;
138}
139#endif