| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 1 | /* |
| Yusuke Goda | b55523e | 2008-03-05 14:23:26 +0900 | [diff] [blame] | 2 | * (C) Copyright 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 3 | * |
| Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 5 | */ |
| 6 | |
| Nobuhiro Iwamatsu | 0b135cf | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 7 | #ifndef _ASM_CPU_SH4_H_ |
| 8 | #define _ASM_CPU_SH4_H_ |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 9 | |
| 10 | /* cache control */ |
| 11 | #define CCR_CACHE_STOP 0x00000808 |
| 12 | #define CCR_CACHE_ENABLE 0x00000101 |
| 13 | #define CCR_CACHE_ICI 0x00000800 |
| 14 | |
| 15 | #define CACHE_OC_ADDRESS_ARRAY 0xf4000000 |
| Nobuhiro Iwamatsu | c54b9a4 | 2008-11-25 11:05:19 +0900 | [diff] [blame] | 16 | |
| 17 | #if defined (CONFIG_CPU_SH7750) || \ |
| 18 | defined(CONFIG_CPU_SH7751) |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 19 | #define CACHE_OC_WAY_SHIFT 14 |
| 20 | #define CACHE_OC_NUM_ENTRIES 512 |
| Nobuhiro Iwamatsu | c54b9a4 | 2008-11-25 11:05:19 +0900 | [diff] [blame] | 21 | #else |
| 22 | #define CACHE_OC_WAY_SHIFT 13 |
| 23 | #define CACHE_OC_NUM_ENTRIES 256 |
| 24 | #endif |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 25 | #define CACHE_OC_ENTRY_SHIFT 5 |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 26 | |
| Nobuhiro Iwamatsu | 5669332 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 27 | #if defined (CONFIG_CPU_SH7750) || \ |
| 28 | defined(CONFIG_CPU_SH7751) |
| 29 | # include <asm/cpu_sh7750.h> |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 30 | #elif defined (CONFIG_CPU_SH7722) |
| Nobuhiro Iwamatsu | 5669332 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 31 | # include <asm/cpu_sh7722.h> |
| Nobuhiro Iwamatsu | ab09f43 | 2008-08-22 17:48:51 +0900 | [diff] [blame] | 32 | #elif defined (CONFIG_CPU_SH7723) |
| 33 | # include <asm/cpu_sh7723.h> |
| Nobuhiro Iwamatsu | bead86a | 2011-11-15 11:00:01 +0900 | [diff] [blame] | 34 | #elif defined (CONFIG_CPU_SH7724) |
| 35 | # include <asm/cpu_sh7724.h> |
| Nobuhiro Iwamatsu | 2a57e7e | 2012-01-11 10:45:01 +0900 | [diff] [blame] | 36 | #elif defined (CONFIG_CPU_SH7734) |
| 37 | # include <asm/cpu_sh7734.h> |
| Yoshihiro Shimoda | 1a2621b | 2012-11-04 15:53:22 +0000 | [diff] [blame] | 38 | #elif defined (CONFIG_CPU_SH7752) |
| 39 | # include <asm/cpu_sh7752.h> |
| Yoshihiro Shimoda | 8e9c897 | 2011-02-02 10:05:36 +0900 | [diff] [blame] | 40 | #elif defined (CONFIG_CPU_SH7757) |
| 41 | # include <asm/cpu_sh7757.h> |
| Nobuhiro Iwamatsu | 6017909 | 2008-06-06 16:24:13 +0900 | [diff] [blame] | 42 | #elif defined (CONFIG_CPU_SH7763) |
| 43 | # include <asm/cpu_sh7763.h> |
| Yusuke Goda | b55523e | 2008-03-05 14:23:26 +0900 | [diff] [blame] | 44 | #elif defined (CONFIG_CPU_SH7780) |
| Nobuhiro Iwamatsu | 5669332 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 45 | # include <asm/cpu_sh7780.h> |
| Yoshihiro Shimoda | b0b6218 | 2008-07-10 19:32:53 +0900 | [diff] [blame] | 46 | #elif defined (CONFIG_CPU_SH7785) |
| 47 | # include <asm/cpu_sh7785.h> |
| Nobuhiro Iwamatsu | 0b135cf | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 48 | #else |
| Nobuhiro Iwamatsu | 5669332 | 2008-03-12 12:10:28 +0900 | [diff] [blame] | 49 | # error "Unknown SH4 variant" |
| Nobuhiro Iwamatsu | 0b135cf | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 50 | #endif |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 51 | |
| Yoshihiro Shimoda | 6d84ae3 | 2009-03-03 15:11:08 +0900 | [diff] [blame] | 52 | #if defined(CONFIG_SH_32BIT) |
| 53 | #define PMB_ADDR_ARRAY 0xf6100000 |
| 54 | #define PMB_ADDR_ENTRY 8 |
| 55 | #define PMB_VPN 24 |
| 56 | |
| 57 | #define PMB_DATA_ARRAY 0xf7100000 |
| 58 | #define PMB_DATA_ENTRY 8 |
| 59 | #define PMB_PPN 24 |
| 60 | #define PMB_UB 9 /* Buffered write */ |
| 61 | #define PMB_V 8 /* Valid */ |
| 62 | #define PMB_SZ1 7 /* Page size (upper bit) */ |
| 63 | #define PMB_SZ0 4 /* Page size (lower bit) */ |
| 64 | #define PMB_C 3 /* Cacheability */ |
| 65 | #define PMB_WT 0 /* Write-through */ |
| 66 | |
| 67 | #define PMB_ADDR_BASE(entry) (PMB_ADDR_ARRAY + (entry << PMB_ADDR_ENTRY)) |
| 68 | #define PMB_DATA_BASE(entry) (PMB_DATA_ARRAY + (entry << PMB_DATA_ENTRY)) |
| 69 | #define mk_pmb_addr_val(vpn) ((vpn << PMB_VPN)) |
| 70 | #define mk_pmb_data_val(ppn, ub, v, sz1, sz0, c, wt) \ |
| 71 | ((ppn << PMB_PPN) | (ub << PMB_UB) | \ |
| 72 | (v << PMB_V) | (sz1 << PMB_SZ1) | \ |
| 73 | (sz0 << PMB_SZ0) | (c << PMB_C) | \ |
| 74 | (wt << PMB_WT)) |
| 75 | #endif |
| 76 | |
| Nobuhiro Iwamatsu | b02bad1 | 2007-09-23 02:12:30 +0900 | [diff] [blame] | 77 | #endif /* _ASM_CPU_SH4_H_ */ |