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Stefan Kristiansson272f84b2011-11-26 19:04:51 +00001/*
2 * (C) Copyright 2011, Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
3 * (C) Copyright 2011, Julius Baxter <julius@opencores.org>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Stefan Kristiansson272f84b2011-11-26 19:04:51 +00006 */
7
8#include <config.h>
9#include <asm-offsets.h>
10#include <asm/spr-defs.h>
11
12#define EXCEPTION_STACK_SIZE (128+128)
13
14#define HANDLE_EXCEPTION \
15 l.addi r1, r1, -EXCEPTION_STACK_SIZE ;\
Julius Baxter3874a372012-05-05 12:32:11 +000016 l.sw 0x00(r1), r2 ;\
Stefan Kristiansson272f84b2011-11-26 19:04:51 +000017 l.sw 0x1c(r1), r9 ;\
Julius Baxter3874a372012-05-05 12:32:11 +000018 l.movhi r2,hi(_exception_handler) ;\
19 l.ori r2,r2,lo(_exception_handler) ;\
20 l.jalr r2 ;\
Stefan Kristiansson272f84b2011-11-26 19:04:51 +000021 l.nop ;\
22 l.lwz r9, 0x1c(r1) ;\
23 l.addi r1, r1, EXCEPTION_STACK_SIZE ;\
24 l.rfe ;\
25 l.nop
26
27 .section .vectors, "ax"
28 .global __reset
29
30 /* reset */
31 .org 0x100
32__reset:
33 /* there is no guarantee r0 is hardwired to zero, clear it here */
34 l.andi r0, r0, 0
35 /* reset stack and frame pointers */
36 l.andi r1, r0, 0
37 l.andi r2, r0, 0
38
39 /* set supervisor mode */
40 l.ori r3,r0,SPR_SR_SM
41 l.mtspr r0,r3,SPR_SR
42
43 /* Relocate u-boot */
44 l.movhi r3,hi(__start) /* source start address */
45 l.ori r3,r3,lo(__start)
46 l.movhi r4,hi(_stext) /* dest start address */
47 l.ori r4,r4,lo(_stext)
48 l.movhi r5,hi(__end) /* dest end address */
49 l.ori r5,r5,lo(__end)
50
51.L_reloc:
52 l.lwz r6,0(r3)
53 l.sw 0(r4),r6
54 l.addi r3,r3,4
55 l.sfltu r4,r5
56 l.bf .L_reloc
57 l.addi r4,r4,4 /* delay slot */
58
59#ifdef CONFIG_SYS_RELOCATE_VECTORS
60 /* Relocate vectors from 0xf0000000 to 0x00000000 */
61 l.movhi r4, 0xf000 /* source */
62 l.movhi r5, 0 /* destination */
63 l.addi r6, r5, CONFIG_SYS_VECTORS_LEN /* length */
64.L_relocvectors:
65 l.lwz r7, 0(r4)
66 l.sw 0(r5), r7
67 l.addi r5, r5, 4
68 l.sfeq r5,r6
69 l.bnf .L_relocvectors
70 l.addi r4,r4, 4
71#endif
Julius Baxter3874a372012-05-05 12:32:11 +000072 l.movhi r4,hi(_start)
73 l.ori r4,r4,lo(_start)
74 l.jr r4
Stefan Kristiansson272f84b2011-11-26 19:04:51 +000075 l.nop
76
77 /* bus error */
78 .org 0x200
79 HANDLE_EXCEPTION
80
81 /* data page fault */
82 .org 0x300
83 HANDLE_EXCEPTION
84
85 /* instruction page fault */
86 .org 0x400
87 HANDLE_EXCEPTION
88
89 /* tick timer */
90 .org 0x500
91 HANDLE_EXCEPTION
92
93 /* alignment */
94 .org 0x600
95 HANDLE_EXCEPTION
96
97 /* illegal instruction */
98 .org 0x700
99 HANDLE_EXCEPTION
100
101 /* external interrupt */
102 .org 0x800
103 HANDLE_EXCEPTION
104
105 /* D-TLB miss */
106 .org 0x900
107 HANDLE_EXCEPTION
108
109 /* I-TLB miss */
110 .org 0xa00
111 HANDLE_EXCEPTION
112
113 /* range */
114 .org 0xb00
115 HANDLE_EXCEPTION
116
117 /* system call */
118 .org 0xc00
119 HANDLE_EXCEPTION
120
121 /* floating point */
122 .org 0xd00
123 HANDLE_EXCEPTION
124
125 /* trap */
126 .org 0xe00
127 HANDLE_EXCEPTION
128
129 /* reserved */
130 .org 0xf00
131 HANDLE_EXCEPTION
132
133 /* reserved */
134 .org 0x1100
135 HANDLE_EXCEPTION
136
137 /* reserved */
138 .org 0x1200
139 HANDLE_EXCEPTION
140
141 /* reserved */
142 .org 0x1300
143 HANDLE_EXCEPTION
144
145 /* reserved */
146 .org 0x1400
147 HANDLE_EXCEPTION
148
149 /* reserved */
150 .org 0x1500
151 HANDLE_EXCEPTION
152
153 /* reserved */
154 .org 0x1600
155 HANDLE_EXCEPTION
156
157 /* reserved */
158 .org 0x1700
159 HANDLE_EXCEPTION
160
161 /* reserved */
162 .org 0x1800
163 HANDLE_EXCEPTION
164
165 /* reserved */
166 .org 0x1900
167 HANDLE_EXCEPTION
168
169 /* reserved */
170 .org 0x1a00
171 HANDLE_EXCEPTION
172
173 /* reserved */
174 .org 0x1b00
175 HANDLE_EXCEPTION
176
177 /* reserved */
178 .org 0x1c00
179 HANDLE_EXCEPTION
180
181 /* reserved */
182 .org 0x1d00
183 HANDLE_EXCEPTION
184
185 /* reserved */
186 .org 0x1e00
187 HANDLE_EXCEPTION
188
189 /* reserved */
190 .org 0x1f00
191 HANDLE_EXCEPTION
192
193 /* Startup routine */
194 .text
195 .global _start
196_start:
197 /* Init stack and frame pointers */
198 l.movhi r1, hi(CONFIG_SYS_INIT_SP_ADDR)
199 l.ori r1, r1, lo(CONFIG_SYS_INIT_SP_ADDR)
200 l.or r2, r0, r1
201
202 /* clear BSS segments */
203 l.movhi r4, hi(_bss_start)
204 l.ori r4, r4, lo(_bss_start)
205 l.movhi r5, hi(_bss_end)
206 l.ori r5, r5, lo(_bss_end)
207.L_clear_bss:
208 l.sw 0(r4), r0
209 l.sfltu r4,r5
210 l.bf .L_clear_bss
211 l.addi r4,r4,4
212
213 /* Reset registers before jumping to board_init */
214 l.andi r3, r0, 0
215 l.andi r4, r0, 0
216 l.andi r5, r0, 0
217 l.andi r6, r0, 0
218 l.andi r7, r0, 0
219 l.andi r8, r0, 0
220 l.andi r9, r0, 0
221 l.andi r10, r0, 0
222 l.andi r11, r0, 0
223 l.andi r12, r0, 0
224 l.andi r13, r0, 0
225 l.andi r14, r0, 0
226 l.andi r15, r0, 0
227 l.andi r17, r0, 0
228 l.andi r18, r0, 0
229 l.andi r19, r0, 0
230 l.andi r20, r0, 0
231 l.andi r21, r0, 0
232 l.andi r22, r0, 0
233 l.andi r23, r0, 0
234 l.andi r24, r0, 0
235 l.andi r25, r0, 0
236 l.andi r26, r0, 0
237 l.andi r27, r0, 0
238 l.andi r28, r0, 0
239 l.andi r29, r0, 0
240 l.andi r30, r0, 0
241 l.andi r31, r0, 0
242
243 l.j board_init
244 l.nop
245
246 .size _start, .-_start
247
248/*
249 * Store state onto stack and call the real exception handler
250 */
251 .section .text
252 .extern exception_handler
253 .type _exception_handler,@function
254
255_exception_handler:
Julius Baxter3874a372012-05-05 12:32:11 +0000256 /* Store state (r2 and r9 already saved)*/
Stefan Kristiansson272f84b2011-11-26 19:04:51 +0000257 l.sw 0x04(r1), r3
258 l.sw 0x08(r1), r4
259 l.sw 0x0c(r1), r5
260 l.sw 0x10(r1), r6
261 l.sw 0x14(r1), r7
262 l.sw 0x18(r1), r8
263 l.sw 0x20(r1), r10
264 l.sw 0x24(r1), r11
265 l.sw 0x28(r1), r12
266 l.sw 0x2c(r1), r13
267 l.sw 0x30(r1), r14
268 l.sw 0x34(r1), r15
269 l.sw 0x38(r1), r16
270 l.sw 0x3c(r1), r17
271 l.sw 0x40(r1), r18
272 l.sw 0x44(r1), r19
273 l.sw 0x48(r1), r20
274 l.sw 0x4c(r1), r21
275 l.sw 0x50(r1), r22
276 l.sw 0x54(r1), r23
277 l.sw 0x58(r1), r24
278 l.sw 0x5c(r1), r25
279 l.sw 0x60(r1), r26
280 l.sw 0x64(r1), r27
281 l.sw 0x68(r1), r28
282 l.sw 0x6c(r1), r29
283 l.sw 0x70(r1), r30
284 l.sw 0x74(r1), r31
285
286 /* Save return address */
287 l.or r14, r0, r9
288 /* Call exception handler with the link address as argument */
289 l.jal exception_handler
290 l.or r3, r0, r14
291 /* Load return address */
292 l.or r9, r0, r14
293
294 /* Restore state */
295 l.lwz r2, 0x00(r1)
296 l.lwz r3, 0x04(r1)
297 l.lwz r4, 0x08(r1)
298 l.lwz r5, 0x0c(r1)
299 l.lwz r6, 0x10(r1)
300 l.lwz r7, 0x14(r1)
301 l.lwz r8, 0x18(r1)
302 l.lwz r10, 0x20(r1)
303 l.lwz r11, 0x24(r1)
304 l.lwz r12, 0x28(r1)
305 l.lwz r13, 0x2c(r1)
306 l.lwz r14, 0x30(r1)
307 l.lwz r15, 0x34(r1)
308 l.lwz r16, 0x38(r1)
309 l.lwz r17, 0x3c(r1)
310 l.lwz r18, 0x40(r1)
311 l.lwz r19, 0x44(r1)
312 l.lwz r20, 0x48(r1)
313 l.lwz r21, 0x4c(r1)
314 l.lwz r22, 0x50(r1)
315 l.lwz r23, 0x54(r1)
316 l.lwz r24, 0x58(r1)
317 l.lwz r25, 0x5c(r1)
318 l.lwz r26, 0x60(r1)
319 l.lwz r27, 0x64(r1)
320 l.lwz r28, 0x68(r1)
321 l.lwz r29, 0x6c(r1)
322 l.lwz r30, 0x70(r1)
323 l.lwz r31, 0x74(r1)
324 l.jr r9
325 l.nop