Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * Based on da830evm.c. Original Copyrights follow: |
| 5 | * |
| 6 | * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> |
| 7 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <i2c.h> |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 26 | #include <net.h> |
| 27 | #include <netdev.h> |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 28 | #include <asm/arch/hardware.h> |
Ben Gardiner | a3f8829 | 2010-10-14 17:26:22 -0400 | [diff] [blame] | 29 | #include <asm/arch/emif_defs.h> |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 30 | #include <asm/arch/emac_defs.h> |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 31 | #include <asm/io.h> |
Sughosh Ganu | d7f9b50 | 2010-11-28 20:21:27 -0500 | [diff] [blame] | 32 | #include <asm/arch/davinci_misc.h> |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 33 | |
| 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
Prakash PM | 37adbf9 | 2010-07-15 16:08:38 -0400 | [diff] [blame] | 36 | #define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 37 | |
| 38 | /* SPI0 pin muxer settings */ |
| 39 | static const struct pinmux_config spi1_pins[] = { |
Prakash PM | 37adbf9 | 2010-07-15 16:08:38 -0400 | [diff] [blame] | 40 | { pinmux(5), 1, 1 }, |
| 41 | { pinmux(5), 1, 2 }, |
| 42 | { pinmux(5), 1, 4 }, |
| 43 | { pinmux(5), 1, 5 } |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 44 | }; |
| 45 | |
| 46 | /* UART pin muxer settings */ |
| 47 | static const struct pinmux_config uart_pins[] = { |
Prakash PM | 37adbf9 | 2010-07-15 16:08:38 -0400 | [diff] [blame] | 48 | { pinmux(0), 4, 6 }, |
| 49 | { pinmux(0), 4, 7 }, |
| 50 | { pinmux(4), 2, 4 }, |
| 51 | { pinmux(4), 2, 5 } |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 52 | }; |
| 53 | |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 54 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 55 | static const struct pinmux_config emac_pins[] = { |
Sudhakar Rajashekhara | d260740 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 56 | #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 57 | { pinmux(14), 8, 2 }, |
| 58 | { pinmux(14), 8, 3 }, |
| 59 | { pinmux(14), 8, 4 }, |
| 60 | { pinmux(14), 8, 5 }, |
| 61 | { pinmux(14), 8, 6 }, |
| 62 | { pinmux(14), 8, 7 }, |
| 63 | { pinmux(15), 8, 1 }, |
| 64 | #else /* ! CONFIG_DRIVER_TI_EMAC_USE_RMII */ |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 65 | { pinmux(2), 8, 1 }, |
| 66 | { pinmux(2), 8, 2 }, |
| 67 | { pinmux(2), 8, 3 }, |
| 68 | { pinmux(2), 8, 4 }, |
| 69 | { pinmux(2), 8, 5 }, |
| 70 | { pinmux(2), 8, 6 }, |
| 71 | { pinmux(2), 8, 7 }, |
| 72 | { pinmux(3), 8, 0 }, |
| 73 | { pinmux(3), 8, 1 }, |
| 74 | { pinmux(3), 8, 2 }, |
| 75 | { pinmux(3), 8, 3 }, |
| 76 | { pinmux(3), 8, 4 }, |
| 77 | { pinmux(3), 8, 5 }, |
| 78 | { pinmux(3), 8, 6 }, |
| 79 | { pinmux(3), 8, 7 }, |
Sudhakar Rajashekhara | d260740 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 80 | #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 81 | { pinmux(4), 8, 0 }, |
| 82 | { pinmux(4), 8, 1 } |
| 83 | }; |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 84 | |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 85 | /* I2C pin muxer settings */ |
| 86 | static const struct pinmux_config i2c_pins[] = { |
Prakash PM | 37adbf9 | 2010-07-15 16:08:38 -0400 | [diff] [blame] | 87 | { pinmux(4), 2, 2 }, |
| 88 | { pinmux(4), 2, 3 } |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 89 | }; |
| 90 | |
Ben Gardiner | 756d1fe | 2010-10-14 17:26:19 -0400 | [diff] [blame] | 91 | #ifdef CONFIG_NAND_DAVINCI |
| 92 | const struct pinmux_config nand_pins[] = { |
| 93 | { pinmux(7), 1, 1 }, |
| 94 | { pinmux(7), 1, 2 }, |
| 95 | { pinmux(7), 1, 4 }, |
| 96 | { pinmux(7), 1, 5 }, |
| 97 | { pinmux(9), 1, 0 }, |
| 98 | { pinmux(9), 1, 1 }, |
| 99 | { pinmux(9), 1, 2 }, |
| 100 | { pinmux(9), 1, 3 }, |
| 101 | { pinmux(9), 1, 4 }, |
| 102 | { pinmux(9), 1, 5 }, |
| 103 | { pinmux(9), 1, 6 }, |
| 104 | { pinmux(9), 1, 7 }, |
| 105 | { pinmux(12), 1, 5 }, |
| 106 | { pinmux(12), 1, 6 } |
| 107 | }; |
| 108 | #endif |
| 109 | |
Sudhakar Rajashekhara | d260740 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 110 | #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 111 | #define HAS_RMII 1 |
| 112 | #else |
| 113 | #define HAS_RMII 0 |
| 114 | #endif |
| 115 | #endif /* CONFIG_DRIVER_TI_EMAC */ |
| 116 | |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 117 | static const struct pinmux_resource pinmuxes[] = { |
| 118 | #ifdef CONFIG_SPI_FLASH |
| 119 | PINMUX_ITEM(spi1_pins), |
| 120 | #endif |
| 121 | PINMUX_ITEM(uart_pins), |
| 122 | PINMUX_ITEM(i2c_pins), |
Ben Gardiner | 756d1fe | 2010-10-14 17:26:19 -0400 | [diff] [blame] | 123 | #ifdef CONFIG_NAND_DAVINCI |
| 124 | PINMUX_ITEM(nand_pins), |
| 125 | #endif |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 126 | }; |
| 127 | |
| 128 | static const struct lpsc_resource lpsc[] = { |
| 129 | { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ |
| 130 | { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ |
| 131 | { DAVINCI_LPSC_EMAC }, /* image download */ |
| 132 | { DAVINCI_LPSC_UART2 }, /* console */ |
| 133 | { DAVINCI_LPSC_GPIO }, |
| 134 | }; |
| 135 | |
Sekhar Nori | 4f6fc15 | 2010-11-19 11:39:48 -0500 | [diff] [blame] | 136 | #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK |
| 137 | #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 |
| 138 | #endif |
| 139 | |
| 140 | /* |
| 141 | * get_board_rev() - setup to pass kernel board revision information |
| 142 | * Returns: |
| 143 | * bit[0-3] Maximum cpu clock rate supported by onboard SoC |
| 144 | * 0000b - 300 MHz |
| 145 | * 0001b - 372 MHz |
| 146 | * 0010b - 408 MHz |
| 147 | * 0011b - 456 MHz |
| 148 | */ |
| 149 | u32 get_board_rev(void) |
| 150 | { |
| 151 | char *s; |
| 152 | u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; |
| 153 | u32 rev = 0; |
| 154 | |
| 155 | s = getenv("maxcpuclk"); |
| 156 | if (s) |
| 157 | maxcpuclk = simple_strtoul(s, NULL, 10); |
| 158 | |
| 159 | if (maxcpuclk >= 456000000) |
| 160 | rev = 3; |
| 161 | else if (maxcpuclk >= 408000000) |
| 162 | rev = 2; |
| 163 | else if (maxcpuclk >= 372000000) |
| 164 | rev = 1; |
| 165 | |
| 166 | return rev; |
| 167 | } |
| 168 | |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 169 | int board_init(void) |
| 170 | { |
| 171 | #ifndef CONFIG_USE_IRQ |
| 172 | irq_init(); |
| 173 | #endif |
| 174 | |
Ben Gardiner | a3f8829 | 2010-10-14 17:26:22 -0400 | [diff] [blame] | 175 | |
| 176 | #ifdef CONFIG_NAND_DAVINCI |
| 177 | /* |
| 178 | * NAND CS setup - cycle counts based on da850evm NAND timings in the |
| 179 | * Linux kernel @ 25MHz EMIFA |
| 180 | */ |
| 181 | writel((DAVINCI_ABCR_WSETUP(0) | |
| 182 | DAVINCI_ABCR_WSTROBE(0) | |
| 183 | DAVINCI_ABCR_WHOLD(0) | |
| 184 | DAVINCI_ABCR_RSETUP(0) | |
| 185 | DAVINCI_ABCR_RSTROBE(1) | |
| 186 | DAVINCI_ABCR_RHOLD(0) | |
| 187 | DAVINCI_ABCR_TA(0) | |
| 188 | DAVINCI_ABCR_ASIZE_8BIT), |
| 189 | &davinci_emif_regs->ab2cr); /* CS3 */ |
| 190 | #endif |
| 191 | |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 192 | /* arch number of the board */ |
| 193 | gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; |
| 194 | |
| 195 | /* address of boot parameters */ |
| 196 | gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; |
| 197 | |
| 198 | /* |
| 199 | * Power on required peripherals |
| 200 | * ARM does not have access by default to PSC0 and PSC1 |
| 201 | * assuming here that the DSP bootloader has set the IOPU |
| 202 | * such that PSC access is available to ARM |
| 203 | */ |
| 204 | if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) |
| 205 | return 1; |
| 206 | |
| 207 | /* setup the SUSPSRC for ARM to control emulation suspend */ |
| 208 | writel(readl(&davinci_syscfg_regs->suspsrc) & |
| 209 | ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | |
| 210 | DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | |
| 211 | DAVINCI_SYSCFG_SUSPSRC_UART2), |
| 212 | &davinci_syscfg_regs->suspsrc); |
| 213 | |
| 214 | /* configure pinmux settings */ |
| 215 | if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) |
| 216 | return 1; |
| 217 | |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 218 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 219 | if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) |
| 220 | return 1; |
Sudhakar Rajashekhara | d260740 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 221 | |
Stefano Babic | 6d1c649 | 2010-11-30 11:32:10 -0500 | [diff] [blame] | 222 | davinci_emac_mii_mode_sel(HAS_RMII); |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 223 | #endif /* CONFIG_DRIVER_TI_EMAC */ |
| 224 | |
Sudhakar Rajashekhara | 89b765c | 2010-06-10 15:18:15 +0530 | [diff] [blame] | 225 | /* enable the console UART */ |
| 226 | writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | |
| 227 | DAVINCI_UART_PWREMU_MGMT_UTRST), |
| 228 | &davinci_uart2_ctrl_regs->pwremu_mgmt); |
| 229 | |
| 230 | return 0; |
| 231 | } |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 232 | |
| 233 | #ifdef CONFIG_DRIVER_TI_EMAC |
| 234 | |
Sudhakar Rajashekhara | d260740 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 235 | #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 236 | /** |
| 237 | * rmii_hw_init |
| 238 | * |
| 239 | * DA850/OMAP-L138 EVM can interface to a daughter card for |
| 240 | * additional features. This card has an I2C GPIO Expander TCA6416 |
| 241 | * to select the required functions like camera, RMII Ethernet, |
| 242 | * character LCD, video. |
| 243 | * |
| 244 | * Initialization of the expander involves configuring the |
| 245 | * polarity and direction of the ports. P07-P05 are used here. |
| 246 | * These ports are connected to a Mux chip which enables only one |
| 247 | * functionality at a time. |
| 248 | * |
| 249 | * For RMII phy to respond, the MII MDIO clock has to be disabled |
| 250 | * since both the PHY devices have address as zero. The MII MDIO |
| 251 | * clock is controlled via GPIO2[6]. |
| 252 | * |
| 253 | * This code is valid for Beta version of the hardware |
| 254 | */ |
| 255 | int rmii_hw_init(void) |
| 256 | { |
| 257 | const struct pinmux_config gpio_pins[] = { |
| 258 | { pinmux(6), 8, 1 } |
| 259 | }; |
| 260 | u_int8_t buf[2]; |
| 261 | unsigned int temp; |
| 262 | int ret; |
| 263 | |
| 264 | /* PinMux for GPIO */ |
| 265 | if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) |
| 266 | return 1; |
| 267 | |
| 268 | /* I2C Exapnder configuration */ |
| 269 | /* Set polarity to non-inverted */ |
| 270 | buf[0] = 0x0; |
| 271 | buf[1] = 0x0; |
| 272 | ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); |
| 273 | if (ret) { |
| 274 | printf("\nExpander @ 0x%02x write FAILED!!!\n", |
| 275 | CONFIG_SYS_I2C_EXPANDER_ADDR); |
| 276 | return ret; |
| 277 | } |
| 278 | |
| 279 | /* Configure P07-P05 as outputs */ |
| 280 | buf[0] = 0x1f; |
| 281 | buf[1] = 0xff; |
| 282 | ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); |
| 283 | if (ret) { |
| 284 | printf("\nExpander @ 0x%02x write FAILED!!!\n", |
| 285 | CONFIG_SYS_I2C_EXPANDER_ADDR); |
| 286 | } |
| 287 | |
| 288 | /* For Ethernet RMII selection |
| 289 | * P07(SelA)=0 |
| 290 | * P06(SelB)=1 |
| 291 | * P05(SelC)=1 |
| 292 | */ |
| 293 | if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { |
| 294 | printf("\nExpander @ 0x%02x read FAILED!!!\n", |
| 295 | CONFIG_SYS_I2C_EXPANDER_ADDR); |
| 296 | } |
| 297 | |
| 298 | buf[0] &= 0x1f; |
| 299 | buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); |
| 300 | if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { |
| 301 | printf("\nExpander @ 0x%02x write FAILED!!!\n", |
| 302 | CONFIG_SYS_I2C_EXPANDER_ADDR); |
| 303 | } |
| 304 | |
| 305 | /* Set the output as high */ |
| 306 | temp = REG(GPIO_BANK2_REG_SET_ADDR); |
| 307 | temp |= (0x01 << 6); |
| 308 | REG(GPIO_BANK2_REG_SET_ADDR) = temp; |
| 309 | |
| 310 | /* Set the GPIO direction as output */ |
| 311 | temp = REG(GPIO_BANK2_REG_DIR_ADDR); |
| 312 | temp &= ~(0x01 << 6); |
| 313 | REG(GPIO_BANK2_REG_DIR_ADDR) = temp; |
| 314 | |
| 315 | return 0; |
| 316 | } |
| 317 | #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ |
| 318 | |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 319 | /* |
| 320 | * Initializes on-board ethernet controllers. |
| 321 | */ |
| 322 | int board_eth_init(bd_t *bis) |
| 323 | { |
Sudhakar Rajashekhara | d260740 | 2010-11-18 09:59:37 -0500 | [diff] [blame] | 324 | #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII |
| 325 | /* Select RMII fucntion through the expander */ |
| 326 | if (rmii_hw_init()) |
| 327 | printf("RMII hardware init failed!!!\n"); |
| 328 | #endif |
Ben Gardiner | 3d248d3 | 2010-10-14 17:26:29 -0400 | [diff] [blame] | 329 | if (!davinci_emac_initialize()) { |
| 330 | printf("Error: Ethernet init failed!\n"); |
| 331 | return -1; |
| 332 | } |
| 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | #endif /* CONFIG_DRIVER_TI_EMAC */ |