blob: 4410f19b76ac0422d370f14beabb6f188b05752d [file] [log] [blame]
Georg Schardt5deb8022008-10-24 13:51:52 +02001/*
2 * (C) Copyright 2008
3 *
4 * Georg Schardt <schardt@team-ctech.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 * CAUTION: This file is based on the xparameters.h automatically
25 * generated by libgen. Version: Xilinx EDK 10.1.02 Build EDK_K_SP2.5
26 */
27
28#ifndef __XPARAMETER_H__
29#define __XPARAMETER_H__
30
31/* RS232 */
32#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
33#define XPAR_UARTNS550_0_BASEADDR 0x83E00000
34
35
36/* INT_C */
37#define XPAR_XPS_INTC_0_DEVICE_ID 0
38#define XPAR_XPS_INTC_0_BASEADDR 0x81800000
39#define XPAR_INTC_MAX_NUM_INTR_INPUTS 2
40
41/* CPU core clock */
42#define XPAR_CORE_CLOCK_FREQ_HZ 300000000
43#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
44
45/* RAM */
46#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
47
48/* FLASH */
Ricardo Ribalda Delgadocc2dc9b2008-10-27 12:35:59 +010049#define XPAR_FLASH_MEM0_BASEADDR 0xFFC00000
Georg Schardt5deb8022008-10-24 13:51:52 +020050
51#endif