blob: b2412b56e15e3a65bc4afe2fbaa1668ae2d3277f [file] [log] [blame]
Ilya Yanok8eb16b72012-11-06 13:06:30 +00001/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments, <www.ti.com>
4 *
5 * Author
6 * Mansoor Ahamed <mansoor.ahamed@ti.com>
7 *
8 * Initial Code from:
9 * Richard Woodruff <r-woodruff2@ti.com>
10 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020011 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok8eb16b72012-11-06 13:06:30 +000012 */
13
14#ifndef _MEM_H_
15#define _MEM_H_
16
17/*
18 * GPMC settings -
19 * Definitions is as per the following format
20 * #define <PART>_GPMC_CONFIG<x> <value>
21 * Where:
22 * PART is the part name e.g. STNOR - Intel Strata Flash
23 * x is GPMC config registers from 1 to 6 (there will be 6 macros)
24 * Value is corresponding value
25 *
26 * For every valid PRCM configuration there should be only one definition of
27 * the same. if values are independent of the board, this definition will be
28 * present in this file if values are dependent on the board, then this should
29 * go into corresponding mem-boardName.h file
30 *
31 * Currently valid part Names are (PART):
32 * M_NAND - Micron NAND
Steve Kipiszcd8845d2013-07-18 15:13:03 -040033 * STNOR - STMicrolelctronics M29W128GL
Ilya Yanok8eb16b72012-11-06 13:06:30 +000034 */
35#define GPMC_SIZE_256M 0x0
36#define GPMC_SIZE_128M 0x8
37#define GPMC_SIZE_64M 0xC
38#define GPMC_SIZE_32M 0xE
39#define GPMC_SIZE_16M 0xF
40
41#define M_NAND_GPMC_CONFIG1 0x00000800
42#define M_NAND_GPMC_CONFIG2 0x001e1e00
43#define M_NAND_GPMC_CONFIG3 0x001e1e00
44#define M_NAND_GPMC_CONFIG4 0x16051807
45#define M_NAND_GPMC_CONFIG5 0x00151e1e
46#define M_NAND_GPMC_CONFIG6 0x16000f80
47#define M_NAND_GPMC_CONFIG7 0x00000008
48
Steve Kipiszcd8845d2013-07-18 15:13:03 -040049#define STNOR_GPMC_CONFIG1 0x00001200
50#define STNOR_GPMC_CONFIG2 0x00101000
51#define STNOR_GPMC_CONFIG3 0x00030301
52#define STNOR_GPMC_CONFIG4 0x10041004
53#define STNOR_GPMC_CONFIG5 0x000C1010
54#define STNOR_GPMC_CONFIG6 0x08070280
55#define STNOR_GPMC_CONFIG7 0x00000F48
56
Ilya Yanok8eb16b72012-11-06 13:06:30 +000057/* max number of GPMC Chip Selects */
58#define GPMC_MAX_CS 8
59/* max number of GPMC regs */
60#define GPMC_MAX_REG 7
61
Ilya Yanok8eb16b72012-11-06 13:06:30 +000062#define DBG_MPDB 6
Ilya Yanok8eb16b72012-11-06 13:06:30 +000063
Ilya Yanok8eb16b72012-11-06 13:06:30 +000064#endif /* endif _MEM_H_ */