blob: 3fc3e749913a41440f4d6c5459b046b858a4664e [file] [log] [blame]
Michal Simek18a952c2018-03-27 10:36:39 +02001// SPDX-License-Identifier: GPL-2.0+
Michal Simekae9775f2017-11-02 11:42:12 +01002/*
3 * dts file for Xilinx ZynqMP ZCU102 Rev1.0
4 *
Michal Simek18a952c2018-03-27 10:36:39 +02005 * (C) Copyright 2016 - 2018, Xilinx, Inc.
Michal Simekae9775f2017-11-02 11:42:12 +01006 *
7 * Michal Simek <michal.simek@xilinx.com>
Michal Simekae9775f2017-11-02 11:42:12 +01008 */
9
10#include "zynqmp-zcu102-revB.dts"
11
12/ {
13 model = "ZynqMP ZCU102 Rev1.0";
14 compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
15};
16
17&eeprom {
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 board_sn: board_sn@0 {
22 reg = <0x0 0x14>;
23 };
24
25 eth_mac: eth_mac@20 {
26 reg = <0x20 0x6>;
27 };
28
29 board_name: board_name@d0 {
30 reg = <0xd0 0x6>;
31 };
32
33 board_revision: board_revision@e0 {
34 reg = <0xe0 0x3>;
35 };
36};