Michal Simek | 18a952c | 2018-03-27 10:36:39 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 2 | /* |
3 | * dts file for Xilinx ZynqMP zc1751-xm018-dc4 | ||||
4 | * | ||||
Michal Simek | 18a952c | 2018-03-27 10:36:39 +0200 | [diff] [blame^] | 5 | * (C) Copyright 2015 - 2018, Xilinx, Inc. |
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 6 | * |
7 | * Michal Simek <michal.simek@xilinx.com> | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 8 | */ |
9 | |||||
10 | /dts-v1/; | ||||
11 | |||||
12 | #include "zynqmp.dtsi" | ||||
Michal Simek | ee4983f | 2017-12-08 14:50:42 +0100 | [diff] [blame] | 13 | #include "zynqmp-clk-ccf.dtsi" |
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 14 | |
15 | / { | ||||
16 | model = "ZynqMP zc1751-xm018-dc4"; | ||||
17 | compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; | ||||
18 | |||||
19 | aliases { | ||||
20 | can0 = &can0; | ||||
21 | can1 = &can1; | ||||
22 | ethernet0 = &gem0; | ||||
23 | ethernet1 = &gem1; | ||||
24 | ethernet2 = &gem2; | ||||
25 | ethernet3 = &gem3; | ||||
26 | gpio0 = &gpio; | ||||
27 | i2c0 = &i2c0; | ||||
28 | i2c1 = &i2c1; | ||||
29 | rtc0 = &rtc; | ||||
30 | serial0 = &uart0; | ||||
31 | serial1 = &uart1; | ||||
32 | spi0 = &qspi; | ||||
33 | }; | ||||
34 | |||||
35 | chosen { | ||||
36 | bootargs = "earlycon"; | ||||
37 | stdout-path = "serial0:115200n8"; | ||||
38 | }; | ||||
39 | |||||
Michal Simek | c926e6f | 2016-11-11 13:21:04 +0100 | [diff] [blame] | 40 | memory@0 { |
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 41 | device_type = "memory"; |
42 | reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; | ||||
43 | }; | ||||
44 | }; | ||||
45 | |||||
46 | &can0 { | ||||
47 | status = "okay"; | ||||
48 | }; | ||||
49 | |||||
50 | &can1 { | ||||
51 | status = "okay"; | ||||
52 | }; | ||||
53 | |||||
54 | /* fpd_dma clk 667MHz, lpd_dma 500MHz */ | ||||
55 | &fpd_dma_chan1 { | ||||
56 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 57 | }; |
58 | |||||
59 | &fpd_dma_chan2 { | ||||
60 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 61 | }; |
62 | |||||
63 | &fpd_dma_chan3 { | ||||
64 | status = "okay"; | ||||
65 | }; | ||||
66 | |||||
67 | &fpd_dma_chan4 { | ||||
68 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 69 | }; |
70 | |||||
71 | &fpd_dma_chan5 { | ||||
72 | status = "okay"; | ||||
73 | }; | ||||
74 | |||||
75 | &fpd_dma_chan6 { | ||||
76 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 77 | }; |
78 | |||||
79 | &fpd_dma_chan7 { | ||||
80 | status = "okay"; | ||||
81 | }; | ||||
82 | |||||
83 | &fpd_dma_chan8 { | ||||
84 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 85 | }; |
86 | |||||
87 | &lpd_dma_chan1 { | ||||
88 | status = "okay"; | ||||
89 | }; | ||||
90 | |||||
91 | &lpd_dma_chan2 { | ||||
92 | status = "okay"; | ||||
93 | }; | ||||
94 | |||||
95 | &lpd_dma_chan3 { | ||||
96 | status = "okay"; | ||||
97 | }; | ||||
98 | |||||
99 | &lpd_dma_chan4 { | ||||
100 | status = "okay"; | ||||
101 | }; | ||||
102 | |||||
103 | &lpd_dma_chan5 { | ||||
104 | status = "okay"; | ||||
105 | }; | ||||
106 | |||||
107 | &lpd_dma_chan6 { | ||||
108 | status = "okay"; | ||||
109 | }; | ||||
110 | |||||
111 | &lpd_dma_chan7 { | ||||
112 | status = "okay"; | ||||
113 | }; | ||||
114 | |||||
115 | &lpd_dma_chan8 { | ||||
116 | status = "okay"; | ||||
117 | }; | ||||
118 | |||||
119 | &xlnx_dp { | ||||
120 | status = "okay"; | ||||
121 | }; | ||||
122 | |||||
123 | &xlnx_dpdma { | ||||
124 | status = "okay"; | ||||
125 | }; | ||||
126 | |||||
127 | &gem0 { | ||||
128 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 129 | phy-mode = "rgmii-id"; |
130 | phy-handle = <ðernet_phy0>; | ||||
131 | ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */ | ||||
132 | reg = <0>; | ||||
133 | }; | ||||
134 | ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */ | ||||
135 | reg = <7>; | ||||
136 | }; | ||||
137 | ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */ | ||||
138 | reg = <3>; | ||||
139 | }; | ||||
140 | ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */ | ||||
141 | reg = <8>; | ||||
142 | }; | ||||
143 | }; | ||||
144 | |||||
145 | &gem1 { | ||||
146 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 147 | phy-mode = "rgmii-id"; |
148 | phy-handle = <ðernet_phy7>; | ||||
149 | }; | ||||
150 | |||||
151 | &gem2 { | ||||
152 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 153 | phy-mode = "rgmii-id"; |
154 | phy-handle = <ðernet_phy3>; | ||||
155 | }; | ||||
156 | |||||
157 | &gem3 { | ||||
158 | status = "okay"; | ||||
Michal Simek | 08ac386 | 2016-05-26 08:06:38 +0200 | [diff] [blame] | 159 | phy-mode = "rgmii-id"; |
160 | phy-handle = <ðernet_phy8>; | ||||
161 | }; | ||||
162 | |||||
163 | &gpio { | ||||
164 | status = "okay"; | ||||
165 | }; | ||||
166 | |||||
167 | &gpu { | ||||
168 | status = "okay"; | ||||
169 | }; | ||||
170 | |||||
171 | &i2c0 { | ||||
172 | clock-frequency = <400000>; | ||||
173 | status = "okay"; | ||||
174 | }; | ||||
175 | |||||
176 | &i2c1 { | ||||
177 | clock-frequency = <400000>; | ||||
178 | status = "okay"; | ||||
179 | }; | ||||
180 | |||||
181 | &rtc { | ||||
182 | status = "okay"; | ||||
183 | }; | ||||
184 | |||||
185 | &uart0 { | ||||
186 | status = "okay"; | ||||
187 | }; | ||||
188 | |||||
189 | &uart1 { | ||||
190 | status = "okay"; | ||||
191 | }; | ||||
192 | |||||
193 | &watchdog0 { | ||||
194 | status = "okay"; | ||||
195 | }; |