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Stelian Popfefb6c12008-01-30 21:15:54 +00001/*
2 * (C) Copyright 2006
Stelian Pop567fb852008-05-08 22:52:09 +02003 * DENX Software Engineering <mk@denx.de>
Stelian Popfefb6c12008-01-30 21:15:54 +00004 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Stelian Popfefb6c12008-01-30 21:15:54 +00006 */
7
8#include <common.h>
9
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020010#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
Stelian Popfefb6c12008-01-30 21:15:54 +000011
Reinhard Meyer86592f62010-11-07 13:26:14 +010012#include <asm/io.h>
Stelian Popfefb6c12008-01-30 21:15:54 +000013#include <asm/arch/hardware.h>
Stelian Pop983c1db2008-03-26 20:52:32 +010014#include <asm/arch/at91_pmc.h>
Jean-Christophe PLAGNIOL-VILLARDdc39ae92009-04-16 21:30:44 +020015#include <asm/arch/clk.h>
Stelian Popfefb6c12008-01-30 21:15:54 +000016
17int usb_cpu_init(void)
18{
Reinhard Meyer372f2782010-11-03 15:47:20 +010019 at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
Stelian Pop3e0cda02008-11-09 00:14:46 +010020
Bo Shendcd2f1a2013-10-21 16:14:00 +080021#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
Stelian Pop3e0cda02008-11-09 00:14:46 +010022 /* Enable PLLB */
Matthias Fuchs0701f732010-03-25 14:30:13 +010023 writel(get_pllb_init(), &pmc->pllbr);
24 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
Stelian Pop3e0cda02008-11-09 00:14:46 +010025 ;
Bo Shend9bef0a2013-10-21 16:13:59 +080026#ifdef CONFIG_AT91SAM9N12
27 writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb);
28#endif
Bo Shendcd2f1a2013-10-21 16:14:00 +080029#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
Sergey Matyukevich64203c72010-06-09 23:09:06 +040030 /* Enable UPLL */
31 writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
32 &pmc->uckr);
33 while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
34 ;
35
36 /* Select PLLA as input clock of OHCI */
37 writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
Stelian Pop3e0cda02008-11-09 00:14:46 +010038#endif
39
Stelian Popfefb6c12008-01-30 21:15:54 +000040 /* Enable USB host clock. */
Bo Shen01c8bf52014-08-06 17:24:56 +080041#ifdef CPU_HAS_PCR
42 at91_periph_clk_enable(ATMEL_ID_UHP);
Bo Shene5e8bb02013-05-12 22:40:53 +000043#else
Reinhard Meyer372f2782010-11-03 15:47:20 +010044 writel(1 << ATMEL_ID_UHP, &pmc->pcer);
Bo Shene5e8bb02013-05-12 22:40:53 +000045#endif
46
Bo Shen158947d2013-04-17 00:09:51 +000047#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
Reinhard Meyer372f2782010-11-03 15:47:20 +010048 writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
Stelian Popd99a8ff2008-05-08 20:52:22 +020049#else
Reinhard Meyer372f2782010-11-03 15:47:20 +010050 writel(ATMEL_PMC_UHP, &pmc->scer);
Stelian Popd99a8ff2008-05-08 20:52:22 +020051#endif
Stelian Popfefb6c12008-01-30 21:15:54 +000052
53 return 0;
54}
55
56int usb_cpu_stop(void)
57{
Reinhard Meyer372f2782010-11-03 15:47:20 +010058 at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
Matthias Fuchs0701f732010-03-25 14:30:13 +010059
Stelian Popfefb6c12008-01-30 21:15:54 +000060 /* Disable USB host clock. */
Bo Shen01c8bf52014-08-06 17:24:56 +080061#ifdef CPU_HAS_PCR
62 at91_periph_clk_disable(ATMEL_ID_UHP);
Bo Shene5e8bb02013-05-12 22:40:53 +000063#else
Reinhard Meyer372f2782010-11-03 15:47:20 +010064 writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
Bo Shene5e8bb02013-05-12 22:40:53 +000065#endif
66
Bo Shen158947d2013-04-17 00:09:51 +000067#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
Reinhard Meyer372f2782010-11-03 15:47:20 +010068 writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
Stelian Popd99a8ff2008-05-08 20:52:22 +020069#else
Reinhard Meyer372f2782010-11-03 15:47:20 +010070 writel(ATMEL_PMC_UHP, &pmc->scdr);
Stelian Popd99a8ff2008-05-08 20:52:22 +020071#endif
Stelian Pop3e0cda02008-11-09 00:14:46 +010072
Bo Shendcd2f1a2013-10-21 16:14:00 +080073#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +080074#ifdef CONFIG_AT91SAM9N12
75 writel(0, &pmc->usb);
76#endif
Stelian Pop3e0cda02008-11-09 00:14:46 +010077 /* Disable PLLB */
Matthias Fuchs0701f732010-03-25 14:30:13 +010078 writel(0, &pmc->pllbr);
79 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
Stelian Pop3e0cda02008-11-09 00:14:46 +010080 ;
Bo Shendcd2f1a2013-10-21 16:14:00 +080081#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL)
Sergey Matyukevich64203c72010-06-09 23:09:06 +040082 /* Disable UPLL */
83 writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
84 while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
85 ;
Stelian Pop3e0cda02008-11-09 00:14:46 +010086#endif
87
Stelian Popfefb6c12008-01-30 21:15:54 +000088 return 0;
89}
90
91int usb_cpu_init_fail(void)
92{
93 return usb_cpu_stop();
94}
95
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */