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Masahiro Yamada3e98fc12018-04-16 12:35:33 +09001// SPDX-License-Identifier: GPL-2.0+ OR MIT
2//
3// Device Tree Source for UniPhier LD11 SoC
4//
5// Copyright (C) 2016 Socionext Inc.
6// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +09007
Masahiro Yamadab443fb42017-11-25 00:25:35 +09008#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/gpio/uniphier-gpio.h>
10
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090011/ {
Masahiro Yamada52159d22016-10-07 16:43:00 +090012 compatible = "socionext,uniphier-ld11";
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090013 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
16
17 cpus {
18 #address-cells = <2>;
19 #size-cells = <0>;
20
Masahiro Yamadac4adc502016-06-29 19:38:56 +090021 cpu-map {
22 cluster0 {
23 core0 {
24 cpu = <&cpu0>;
25 };
26 core1 {
27 cpu = <&cpu1>;
28 };
29 };
30 };
31
32 cpu0: cpu@0 {
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090033 device_type = "cpu";
Masahiro Yamadacd33fed2019-04-12 18:55:50 +090034 compatible = "arm,cortex-a53";
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090035 reg = <0 0x000>;
Masahiro Yamadacd622142016-12-05 18:31:39 +090036 clocks = <&sys_clk 33>;
37 enable-method = "psci";
38 operating-points-v2 = <&cluster0_opp>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090039 };
40
Masahiro Yamadac4adc502016-06-29 19:38:56 +090041 cpu1: cpu@1 {
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090042 device_type = "cpu";
Masahiro Yamadacd33fed2019-04-12 18:55:50 +090043 compatible = "arm,cortex-a53";
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090044 reg = <0 0x001>;
Masahiro Yamadacd622142016-12-05 18:31:39 +090045 clocks = <&sys_clk 33>;
46 enable-method = "psci";
47 operating-points-v2 = <&cluster0_opp>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090048 };
49 };
50
Masahiro Yamadab443fb42017-11-25 00:25:35 +090051 cluster0_opp: opp-table {
Masahiro Yamadacd622142016-12-05 18:31:39 +090052 compatible = "operating-points-v2";
53 opp-shared;
54
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090055 opp-245000000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090056 opp-hz = /bits/ 64 <245000000>;
57 clock-latency-ns = <300>;
58 };
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090059 opp-250000000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090060 opp-hz = /bits/ 64 <250000000>;
61 clock-latency-ns = <300>;
62 };
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090063 opp-490000000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090064 opp-hz = /bits/ 64 <490000000>;
65 clock-latency-ns = <300>;
66 };
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090067 opp-500000000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090068 opp-hz = /bits/ 64 <500000000>;
69 clock-latency-ns = <300>;
70 };
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090071 opp-653334000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090072 opp-hz = /bits/ 64 <653334000>;
73 clock-latency-ns = <300>;
74 };
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090075 opp-666667000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090076 opp-hz = /bits/ 64 <666667000>;
77 clock-latency-ns = <300>;
78 };
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +090079 opp-980000000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +090080 opp-hz = /bits/ 64 <980000000>;
81 clock-latency-ns = <300>;
82 };
83 };
84
85 psci {
86 compatible = "arm,psci-1.0";
87 method = "smc";
88 };
89
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090090 clocks {
Masahiro Yamadac4adc502016-06-29 19:38:56 +090091 refclk: ref {
92 compatible = "fixed-clock";
93 #clock-cells = <0>;
94 clock-frequency = <25000000>;
95 };
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +090096 };
97
Masahiro Yamadab443fb42017-11-25 00:25:35 +090098 emmc_pwrseq: emmc-pwrseq {
99 compatible = "mmc-pwrseq-emmc";
100 reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>;
101 };
102
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900103 timer {
104 compatible = "arm,armv8-timer";
Masahiro Yamada35343a22016-09-22 07:42:23 +0900105 interrupts = <1 13 4>,
106 <1 14 4>,
107 <1 11 4>,
108 <1 10 4>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900109 };
110
Masahiro Yamada47eb8ad2019-07-10 20:07:29 +0900111 reserved-memory {
112 #address-cells = <2>;
113 #size-cells = <2>;
114 ranges;
115
116 secure-memory@81000000 {
117 reg = <0x0 0x81000000 0x0 0x01000000>;
118 no-map;
119 };
120 };
121
Masahiro Yamada7ad79c12017-03-13 00:16:40 +0900122 soc@0 {
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900123 compatible = "simple-bus";
124 #address-cells = <1>;
125 #size-cells = <1>;
126 ranges = <0 0 0 0xffffffff>;
127
Masahiro Yamada2001a812018-12-19 20:03:21 +0900128 spi0: spi@54006000 {
129 compatible = "socionext,uniphier-scssi";
130 status = "disabled";
131 reg = <0x54006000 0x100>;
132 interrupts = <0 39 4>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_spi0>;
135 clocks = <&peri_clk 11>;
136 resets = <&peri_rst 11>;
137 };
138
139 spi1: spi@54006100 {
140 compatible = "socionext,uniphier-scssi";
141 status = "disabled";
142 reg = <0x54006100 0x100>;
143 interrupts = <0 216 4>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_spi1>;
146 clocks = <&peri_clk 11>;
147 resets = <&peri_rst 11>;
148 };
149
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900150 serial0: serial@54006800 {
151 compatible = "socionext,uniphier-uart";
152 status = "disabled";
153 reg = <0x54006800 0x40>;
154 interrupts = <0 33 4>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_uart0>;
Masahiro Yamada35343a22016-09-22 07:42:23 +0900157 clocks = <&peri_clk 0>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900158 resets = <&peri_rst 0>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900159 };
160
161 serial1: serial@54006900 {
162 compatible = "socionext,uniphier-uart";
163 status = "disabled";
164 reg = <0x54006900 0x40>;
165 interrupts = <0 35 4>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_uart1>;
Masahiro Yamada35343a22016-09-22 07:42:23 +0900168 clocks = <&peri_clk 1>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900169 resets = <&peri_rst 1>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900170 };
171
172 serial2: serial@54006a00 {
173 compatible = "socionext,uniphier-uart";
174 status = "disabled";
175 reg = <0x54006a00 0x40>;
176 interrupts = <0 37 4>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_uart2>;
Masahiro Yamada35343a22016-09-22 07:42:23 +0900179 clocks = <&peri_clk 2>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900180 resets = <&peri_rst 2>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900181 };
182
183 serial3: serial@54006b00 {
184 compatible = "socionext,uniphier-uart";
185 status = "disabled";
186 reg = <0x54006b00 0x40>;
187 interrupts = <0 177 4>;
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_uart3>;
Masahiro Yamada35343a22016-09-22 07:42:23 +0900190 clocks = <&peri_clk 3>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900191 resets = <&peri_rst 3>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900192 };
193
Masahiro Yamada0f72b742017-10-13 19:21:52 +0900194 gpio: gpio@55000000 {
195 compatible = "socionext,uniphier-gpio";
196 reg = <0x55000000 0x200>;
197 interrupt-parent = <&aidet>;
198 interrupt-controller;
199 #interrupt-cells = <2>;
200 gpio-controller;
201 #gpio-cells = <2>;
202 gpio-ranges = <&pinctrl 0 0 0>,
203 <&pinctrl 43 0 0>,
204 <&pinctrl 51 0 0>,
205 <&pinctrl 96 0 0>,
206 <&pinctrl 160 0 0>,
207 <&pinctrl 184 0 0>;
208 gpio-ranges-group-names = "gpio_range0",
209 "gpio_range1",
210 "gpio_range2",
211 "gpio_range3",
212 "gpio_range4",
213 "gpio_range5";
214 ngpios = <200>;
Masahiro Yamada27287482017-10-17 21:19:43 +0900215 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
216 <21 217 3>;
217 };
218
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900219 audio@56000000 {
220 compatible = "socionext,uniphier-ld11-aio";
221 reg = <0x56000000 0x80000>;
222 interrupts = <0 144 4>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_aout1>,
225 <&pinctrl_aoutiec1>;
226 clock-names = "aio";
227 clocks = <&sys_clk 40>;
228 reset-names = "aio";
229 resets = <&sys_rst 40>;
230 #sound-dai-cells = <1>;
231 socionext,syscon = <&soc_glue>;
232
233 i2s_port0: port@0 {
234 i2s_hdmi: endpoint {
235 };
236 };
237
238 i2s_port1: port@1 {
239 i2s_pcmin2: endpoint {
240 };
241 };
242
243 i2s_port2: port@2 {
244 i2s_line: endpoint {
245 dai-format = "i2s";
246 remote-endpoint = <&evea_line>;
247 };
248 };
249
250 i2s_port3: port@3 {
251 i2s_hpcmout1: endpoint {
252 };
253 };
254
255 i2s_port4: port@4 {
256 i2s_hp: endpoint {
257 dai-format = "i2s";
258 remote-endpoint = <&evea_hp>;
259 };
260 };
261
262 spdif_port0: port@5 {
263 spdif_hiecout1: endpoint {
264 };
265 };
266
267 src_port0: port@6 {
268 i2s_epcmout2: endpoint {
269 };
270 };
271
272 src_port1: port@7 {
273 i2s_epcmout3: endpoint {
274 };
275 };
276
277 comp_spdif_port0: port@8 {
278 comp_spdif_hiecout1: endpoint {
279 };
280 };
281 };
282
283 codec@57900000 {
284 compatible = "socionext,uniphier-evea";
285 reg = <0x57900000 0x1000>;
286 clock-names = "evea", "exiv";
287 clocks = <&sys_clk 41>, <&sys_clk 42>;
288 reset-names = "evea", "exiv", "adamv";
289 resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;
290 #sound-dai-cells = <1>;
291
292 port@0 {
293 evea_line: endpoint {
294 remote-endpoint = <&i2s_line>;
295 };
296 };
297
298 port@1 {
299 evea_hp: endpoint {
300 remote-endpoint = <&i2s_hp>;
301 };
302 };
303 };
304
Masahiro Yamada27287482017-10-17 21:19:43 +0900305 adamv@57920000 {
306 compatible = "socionext,uniphier-ld11-adamv",
307 "simple-mfd", "syscon";
308 reg = <0x57920000 0x1000>;
309
310 adamv_rst: reset {
311 compatible = "socionext,uniphier-ld11-adamv-reset";
312 #reset-cells = <1>;
313 };
Masahiro Yamada0f72b742017-10-13 19:21:52 +0900314 };
315
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900316 i2c0: i2c@58780000 {
317 compatible = "socionext,uniphier-fi2c";
318 status = "disabled";
319 reg = <0x58780000 0x80>;
320 #address-cells = <1>;
321 #size-cells = <0>;
322 interrupts = <0 41 4>;
323 pinctrl-names = "default";
324 pinctrl-0 = <&pinctrl_i2c0>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900325 clocks = <&peri_clk 4>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900326 resets = <&peri_rst 4>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900327 clock-frequency = <100000>;
328 };
329
330 i2c1: i2c@58781000 {
331 compatible = "socionext,uniphier-fi2c";
332 status = "disabled";
333 reg = <0x58781000 0x80>;
334 #address-cells = <1>;
335 #size-cells = <0>;
336 interrupts = <0 42 4>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&pinctrl_i2c1>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900339 clocks = <&peri_clk 5>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900340 resets = <&peri_rst 5>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900341 clock-frequency = <100000>;
342 };
343
344 i2c2: i2c@58782000 {
345 compatible = "socionext,uniphier-fi2c";
346 reg = <0x58782000 0x80>;
347 #address-cells = <1>;
348 #size-cells = <0>;
349 interrupts = <0 43 4>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900350 clocks = <&peri_clk 6>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900351 resets = <&peri_rst 6>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900352 clock-frequency = <400000>;
353 };
354
355 i2c3: i2c@58783000 {
356 compatible = "socionext,uniphier-fi2c";
357 status = "disabled";
358 reg = <0x58783000 0x80>;
359 #address-cells = <1>;
360 #size-cells = <0>;
361 interrupts = <0 44 4>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_i2c3>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900364 clocks = <&peri_clk 7>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900365 resets = <&peri_rst 7>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900366 clock-frequency = <100000>;
367 };
368
369 i2c4: i2c@58784000 {
370 compatible = "socionext,uniphier-fi2c";
371 status = "disabled";
372 reg = <0x58784000 0x80>;
373 #address-cells = <1>;
374 #size-cells = <0>;
375 interrupts = <0 45 4>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_i2c4>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900378 clocks = <&peri_clk 8>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900379 resets = <&peri_rst 8>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900380 clock-frequency = <100000>;
381 };
382
383 i2c5: i2c@58785000 {
384 compatible = "socionext,uniphier-fi2c";
385 reg = <0x58785000 0x80>;
386 #address-cells = <1>;
387 #size-cells = <0>;
388 interrupts = <0 25 4>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900389 clocks = <&peri_clk 9>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900390 resets = <&peri_rst 9>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900391 clock-frequency = <400000>;
392 };
393
394 system_bus: system-bus@58c00000 {
395 compatible = "socionext,uniphier-system-bus";
396 status = "disabled";
397 reg = <0x58c00000 0x400>;
398 #address-cells = <2>;
399 #size-cells = <1>;
Masahiro Yamadac4adc502016-06-29 19:38:56 +0900400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_system_bus>;
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900402 };
403
Masahiro Yamadaabb6ac22017-05-15 14:23:46 +0900404 smpctrl@59801000 {
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900405 compatible = "socionext,uniphier-smpctrl";
406 reg = <0x59801000 0x400>;
407 };
408
Masahiro Yamadacd622142016-12-05 18:31:39 +0900409 sdctrl@59810000 {
410 compatible = "socionext,uniphier-ld11-sdctrl",
411 "simple-mfd", "syscon";
412 reg = <0x59810000 0x400>;
413
414 sd_rst: reset {
415 compatible = "socionext,uniphier-ld11-sd-reset";
416 #reset-cells = <1>;
417 };
418 };
419
Masahiro Yamada35343a22016-09-22 07:42:23 +0900420 perictrl@59820000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +0900421 compatible = "socionext,uniphier-ld11-perictrl",
Masahiro Yamada35343a22016-09-22 07:42:23 +0900422 "simple-mfd", "syscon";
423 reg = <0x59820000 0x200>;
424
425 peri_clk: clock {
426 compatible = "socionext,uniphier-ld11-peri-clock";
427 #clock-cells = <1>;
428 };
429
430 peri_rst: reset {
431 compatible = "socionext,uniphier-ld11-peri-reset";
432 #reset-cells = <1>;
433 };
434 };
435
Masahiro Yamada44ebaa82020-02-28 21:57:19 +0900436 emmc: mmc@5a000000 {
Masahiro Yamada7a6139c2017-01-04 20:08:37 +0900437 compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900438 reg = <0x5a000000 0x400>;
439 interrupts = <0 78 4>;
440 pinctrl-names = "default";
Masahiro Yamada33aae6b2018-09-10 12:58:32 +0900441 pinctrl-0 = <&pinctrl_emmc>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900442 clocks = <&sys_clk 4>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900443 resets = <&sys_rst 4>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900444 bus-width = <8>;
445 mmc-ddr-1_8v;
446 mmc-hs200-1_8v;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900447 mmc-pwrseq = <&emmc_pwrseq>;
Masahiro Yamadac3d3e2a2018-05-23 00:30:54 +0900448 cdns,phy-input-delay-legacy = <9>;
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +0900449 cdns,phy-input-delay-mmc-highspeed = <2>;
450 cdns,phy-input-delay-mmc-ddr = <3>;
451 cdns,phy-dll-delay-sdclk = <21>;
452 cdns,phy-dll-delay-sdclk-hsmmc = <21>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900453 };
454
Masahiro Yamadad7e103c2016-05-24 21:14:03 +0900455 usb0: usb@5a800100 {
456 compatible = "socionext,uniphier-ehci", "generic-ehci";
457 status = "disabled";
458 reg = <0x5a800100 0x100>;
459 interrupts = <0 243 4>;
460 pinctrl-names = "default";
461 pinctrl-0 = <&pinctrl_usb0>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900462 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
463 <&mio_clk 12>;
Masahiro Yamada52159d22016-10-07 16:43:00 +0900464 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
465 <&mio_rst 12>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900466 phy-names = "usb";
467 phys = <&usb_phy0>;
Masahiro Yamada46820e32018-03-15 11:43:03 +0900468 has-transaction-translator;
Masahiro Yamadad7e103c2016-05-24 21:14:03 +0900469 };
470
471 usb1: usb@5a810100 {
472 compatible = "socionext,uniphier-ehci", "generic-ehci";
473 status = "disabled";
474 reg = <0x5a810100 0x100>;
475 interrupts = <0 244 4>;
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_usb1>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900478 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
479 <&mio_clk 13>;
Masahiro Yamada52159d22016-10-07 16:43:00 +0900480 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
481 <&mio_rst 13>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900482 phy-names = "usb";
483 phys = <&usb_phy1>;
Masahiro Yamada46820e32018-03-15 11:43:03 +0900484 has-transaction-translator;
Masahiro Yamadad7e103c2016-05-24 21:14:03 +0900485 };
486
487 usb2: usb@5a820100 {
488 compatible = "socionext,uniphier-ehci", "generic-ehci";
489 status = "disabled";
490 reg = <0x5a820100 0x100>;
491 interrupts = <0 245 4>;
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_usb2>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900494 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
495 <&mio_clk 14>;
Masahiro Yamada52159d22016-10-07 16:43:00 +0900496 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
497 <&mio_rst 14>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900498 phy-names = "usb";
499 phys = <&usb_phy2>;
Masahiro Yamada46820e32018-03-15 11:43:03 +0900500 has-transaction-translator;
Masahiro Yamadad7e103c2016-05-24 21:14:03 +0900501 };
502
Masahiro Yamada35343a22016-09-22 07:42:23 +0900503 mioctrl@5b3e0000 {
Masahiro Yamada7317a942017-03-13 00:16:41 +0900504 compatible = "socionext,uniphier-ld11-mioctrl",
Masahiro Yamada35343a22016-09-22 07:42:23 +0900505 "simple-mfd", "syscon";
Masahiro Yamadad7e103c2016-05-24 21:14:03 +0900506 reg = <0x5b3e0000 0x800>;
Masahiro Yamada35343a22016-09-22 07:42:23 +0900507
508 mio_clk: clock {
509 compatible = "socionext,uniphier-ld11-mio-clock";
510 #clock-cells = <1>;
511 };
512
513 mio_rst: reset {
514 compatible = "socionext,uniphier-ld11-mio-reset";
515 #reset-cells = <1>;
516 resets = <&sys_rst 7>;
517 };
Masahiro Yamadad7e103c2016-05-24 21:14:03 +0900518 };
519
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900520 soc_glue: soc-glue@5f800000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +0900521 compatible = "socionext,uniphier-ld11-soc-glue",
Masahiro Yamada35343a22016-09-22 07:42:23 +0900522 "simple-mfd", "syscon";
Masahiro Yamadac4adc502016-06-29 19:38:56 +0900523 reg = <0x5f800000 0x2000>;
Masahiro Yamadac4adc502016-06-29 19:38:56 +0900524
525 pinctrl: pinctrl {
526 compatible = "socionext,uniphier-ld11-pinctrl";
Masahiro Yamadac4adc502016-06-29 19:38:56 +0900527 };
Masahiro Yamada2001a812018-12-19 20:03:21 +0900528
529 usb-phy {
530 compatible = "socionext,uniphier-ld11-usb2-phy";
531 #address-cells = <1>;
532 #size-cells = <0>;
533
534 usb_phy0: phy@0 {
535 reg = <0>;
536 #phy-cells = <0>;
537 };
538
539 usb_phy1: phy@1 {
540 reg = <1>;
541 #phy-cells = <0>;
542 };
543
544 usb_phy2: phy@2 {
545 reg = <2>;
546 #phy-cells = <0>;
547 };
548 };
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900549 };
550
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900551 soc-glue@5f900000 {
552 compatible = "socionext,uniphier-ld11-soc-glue-debug",
553 "simple-mfd";
554 #address-cells = <1>;
555 #size-cells = <1>;
556 ranges = <0 0x5f900000 0x2000>;
557
558 efuse@100 {
559 compatible = "socionext,uniphier-efuse";
560 reg = <0x100 0x28>;
561 };
562
563 efuse@200 {
564 compatible = "socionext,uniphier-efuse";
565 reg = <0x200 0x68>;
566 };
567 };
568
Masahiro Yamada44ebaa82020-02-28 21:57:19 +0900569 aidet: interrupt-controller@5fc20000 {
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900570 compatible = "socionext,uniphier-ld11-aidet";
Masahiro Yamada1013aef2016-06-29 19:39:02 +0900571 reg = <0x5fc20000 0x200>;
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900572 interrupt-controller;
573 #interrupt-cells = <2>;
Masahiro Yamada1013aef2016-06-29 19:39:02 +0900574 };
575
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900576 gic: interrupt-controller@5fe00000 {
577 compatible = "arm,gic-v3";
578 reg = <0x5fe00000 0x10000>, /* GICD */
579 <0x5fe40000 0x80000>; /* GICR */
580 interrupt-controller;
581 #interrupt-cells = <3>;
582 interrupts = <1 9 4>;
583 };
Masahiro Yamada35343a22016-09-22 07:42:23 +0900584
585 sysctrl@61840000 {
586 compatible = "socionext,uniphier-ld11-sysctrl",
587 "simple-mfd", "syscon";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900588 reg = <0x61840000 0x10000>;
Masahiro Yamada35343a22016-09-22 07:42:23 +0900589
590 sys_clk: clock {
591 compatible = "socionext,uniphier-ld11-clock";
592 #clock-cells = <1>;
593 };
594
595 sys_rst: reset {
596 compatible = "socionext,uniphier-ld11-reset";
597 #reset-cells = <1>;
598 };
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900599
600 watchdog {
601 compatible = "socionext,uniphier-wdt";
602 };
Masahiro Yamada35343a22016-09-22 07:42:23 +0900603 };
Masahiro Yamadacd622142016-12-05 18:31:39 +0900604
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900605 eth: ethernet@65000000 {
606 compatible = "socionext,uniphier-ld11-ave4";
607 status = "disabled";
608 reg = <0x65000000 0x8500>;
609 interrupts = <0 66 4>;
Kunihiko Hayashi3c0fa6c2018-05-11 18:49:16 +0900610 clock-names = "ether";
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900611 clocks = <&sys_clk 6>;
Kunihiko Hayashi3c0fa6c2018-05-11 18:49:16 +0900612 reset-names = "ether";
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900613 resets = <&sys_rst 6>;
Kunihiko Hayashif6acbf82018-05-11 18:49:17 +0900614 phy-mode = "internal";
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900615 local-mac-address = [00 00 00 00 00 00];
Kunihiko Hayashi69b3d4e2018-05-11 18:49:14 +0900616 socionext,syscon-phy-mode = <&soc_glue 0>;
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900617
618 mdio: mdio {
619 #address-cells = <1>;
620 #size-cells = <0>;
621 };
622 };
623
Masahiro Yamada44ebaa82020-02-28 21:57:19 +0900624 nand: nand-controller@68000000 {
Masahiro Yamada4e7f8de2017-04-20 16:54:44 +0900625 compatible = "socionext,uniphier-denali-nand-v5b";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900626 status = "disabled";
627 reg-names = "nand_data", "denali_reg";
628 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
629 interrupts = <0 65 4>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_nand>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900632 clock-names = "nand", "nand_x", "ecc";
633 clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
Masahiro Yamada5ad15962020-02-28 21:57:20 +0900634 reset-names = "nand", "reg";
635 resets = <&sys_rst 2>, <&sys_rst 2>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900636 };
Masahiro Yamadafc26b7b2016-03-18 16:41:49 +0900637 };
638};
639
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900640#include "uniphier-pinctrl.dtsi"
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900641
642&pinctrl_aoutiec1 {
643 drive-strength = <4>; /* default: 4mA */
644
645 ao1arc {
646 pins = "AO1ARC";
647 drive-strength = <8>; /* 8mA */
648 };
649};