blob: 7f1fdd1534c079638d16f2e8967ad0b4571276e0 [file] [log] [blame]
Tom Rixcd782632009-06-28 12:52:29 -05001/*
2 * Copyright (c) 2009 Wind River Systems, Inc.
3 * Tom Rix <Tom.Rix at windriver.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Rixcd782632009-06-28 12:52:29 -05006 *
Tom Rix2c155132009-06-28 12:52:30 -05007 * twl4030_power_reset_init is derived from code on omapzoom,
8 * git://git.omapzoom.com/repo/u-boot.git
Tom Rixcd782632009-06-28 12:52:29 -05009 *
10 * Copyright (C) 2007-2009 Texas Instruments, Inc.
Tom Rix2c155132009-06-28 12:52:30 -050011 *
12 * twl4030_power_init is from cpu/omap3/common.c, power_init_r
13 *
14 * (C) Copyright 2004-2008
15 * Texas Instruments, <www.ti.com>
16 *
17 * Author :
18 * Sunil Kumar <sunilsaini05 at gmail.com>
19 * Shashi Ranjan <shashiranjanmca05 at gmail.com>
20 *
21 * Derived from Beagle Board and 3430 SDP code by
22 * Richard Woodruff <r-woodruff2 at ti.com>
23 * Syed Mohammed Khasim <khasim at ti.com>
Tom Rixcd782632009-06-28 12:52:29 -050024 */
25
26#include <twl4030.h>
27
28/*
29 * Power Reset
30 */
31void twl4030_power_reset_init(void)
32{
33 u8 val = 0;
Nishanth Menonb29c2f02013-03-26 05:20:50 +000034 if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
35 TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) {
Tom Rixcd782632009-06-28 12:52:29 -050036 printf("Error:TWL4030: failed to read the power register\n");
37 printf("Could not initialize hardware reset\n");
38 } else {
39 val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON;
Nishanth Menon0208aaf2013-03-26 05:20:49 +000040 if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
41 TWL4030_PM_MASTER_P1_SW_EVENTS, val)) {
Tom Rixcd782632009-06-28 12:52:29 -050042 printf("Error:TWL4030: failed to write the power register\n");
43 printf("Could not initialize hardware reset\n");
44 }
45 }
46}
47
Tom Rix2c155132009-06-28 12:52:30 -050048/*
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070049 * Set Device Group and Voltage
Tom Rix2c155132009-06-28 12:52:30 -050050 */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070051void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
52 u8 dev_grp, u8 dev_grp_sel)
53{
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +000054 int ret;
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070055
56 /* Select the Voltage */
Nishanth Menon0208aaf2013-03-26 05:20:49 +000057 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg,
58 vsel_val);
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +000059 if (ret != 0) {
Peter Meerwalddfe36102012-11-19 23:13:04 +000060 printf("Could not write vsel to reg %02x (%d)\n",
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +000061 vsel_reg, ret);
62 return;
63 }
64
65 /* Select the Device Group (enable the supply if dev_grp_sel != 0) */
Nishanth Menon0208aaf2013-03-26 05:20:49 +000066 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp,
67 dev_grp_sel);
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +000068 if (ret != 0)
Peter Meerwalddfe36102012-11-19 23:13:04 +000069 printf("Could not write grp_sel to reg %02x (%d)\n",
Grazvydas Ignotas61712bc2012-03-19 03:37:40 +000070 dev_grp, ret);
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070071}
Tom Rix2c155132009-06-28 12:52:30 -050072
73void twl4030_power_init(void)
74{
Tom Rix2c155132009-06-28 12:52:30 -050075 /* set VAUX3 to 2.8V */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070076 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED,
77 TWL4030_PM_RECEIVER_VAUX3_VSEL_28,
78 TWL4030_PM_RECEIVER_VAUX3_DEV_GRP,
79 TWL4030_PM_RECEIVER_DEV_GRP_P1);
Tom Rix2c155132009-06-28 12:52:30 -050080
81 /* set VPLL2 to 1.8V */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070082 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED,
83 TWL4030_PM_RECEIVER_VPLL2_VSEL_18,
84 TWL4030_PM_RECEIVER_VPLL2_DEV_GRP,
85 TWL4030_PM_RECEIVER_DEV_GRP_ALL);
Tom Rix2c155132009-06-28 12:52:30 -050086
87 /* set VDAC to 1.8V */
Steve Sakoman5a0a82f2010-08-10 12:58:39 -070088 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
89 TWL4030_PM_RECEIVER_VDAC_VSEL_18,
90 TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
91 TWL4030_PM_RECEIVER_DEV_GRP_P1);
Tom Rix2c155132009-06-28 12:52:30 -050092}
93
Paul Kocialkowskif3e85e42014-11-08 20:55:46 +010094void twl4030_power_mmc_init(int dev_index)
Tom Rixfccc0fc2009-06-28 12:52:31 -050095{
Paul Kocialkowskif3e85e42014-11-08 20:55:46 +010096 if (dev_index == 0) {
97 /* Set VMMC1 to 3.15 Volts */
98 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
99 TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
100 TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
101 TWL4030_PM_RECEIVER_DEV_GRP_P1);
Paul Kocialkowski2ed8c872014-10-28 18:14:23 +0100102
Paul Kocialkowskif3e85e42014-11-08 20:55:46 +0100103 mdelay(100); /* ramp-up delay from Linux code */
104 } else if (dev_index == 1) {
105 /* Set VMMC2 to 3.15 Volts */
106 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
107 TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
108 TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
109 TWL4030_PM_RECEIVER_DEV_GRP_P1);
110
111 mdelay(100); /* ramp-up delay from Linux code */
112 }
Tom Rixfccc0fc2009-06-28 12:52:31 -0500113}