Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2014 |
| 3 | * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_STV0991_H |
| 9 | #define __CONFIG_STV0991_H |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 10 | #define CONFIG_SYS_DCACHE_OFF |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 11 | #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
| 12 | #define CONFIG_BOARD_EARLY_INIT_F |
Vikas Manocha | 2ce4eaf | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 13 | |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 14 | #define CONFIG_SYS_CORTEX_R4 |
| 15 | |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 16 | #define CONFIG_SYS_NO_FLASH |
| 17 | |
| 18 | /* ram memory-related information */ |
| 19 | #define CONFIG_NR_DRAM_BANKS 1 |
| 20 | #define PHYS_SDRAM_1 0x00000000 |
| 21 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 22 | #define PHYS_SDRAM_1_SIZE 0x00198000 |
| 23 | |
| 24 | #define CONFIG_ENV_SIZE 0x10000 |
Vikas Manocha | 137d5b9 | 2015-07-02 18:29:37 -0700 | [diff] [blame] | 25 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 26 | #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE |
| 27 | #define CONFIG_ENV_OFFSET 0x30000 |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 28 | #define CONFIG_ENV_ADDR \ |
| 29 | (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) |
| 30 | #define CONFIG_SYS_MAXARGS 16 |
| 31 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) |
| 32 | |
| 33 | /* serial port (PL011) configuration */ |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 34 | #define CONFIG_BAUDRATE 115200 |
Vikas Manocha | 39e4795 | 2014-12-01 12:27:54 -0800 | [diff] [blame] | 35 | #define CONFIG_PL01X_SERIAL |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 36 | |
| 37 | /* user interface */ |
Vikas Manocha | c55e759 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 38 | #define CONFIG_SYS_CBSIZE 1024 |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 39 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ |
| 40 | +sizeof(CONFIG_SYS_PROMPT) + 16) |
| 41 | |
| 42 | /* MISC */ |
| 43 | #define CONFIG_SYS_LOAD_ADDR 0x00000000 |
Vikas Manocha | 498b7c2 | 2014-12-01 12:27:53 -0800 | [diff] [blame] | 44 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 45 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 |
| 46 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 47 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 48 | /* U-Boot Load Address */ |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 49 | #define CONFIG_SYS_TEXT_BASE 0x00010000 |
| 50 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 51 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 52 | |
Vikas Manocha | 2ce4eaf | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 53 | /* GMAC related configs */ |
| 54 | |
| 55 | #define CONFIG_MII |
Vikas Manocha | 2ce4eaf | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 56 | #define CONFIG_DW_ALTDESCRIPTOR |
| 57 | #define CONFIG_PHY_MICREL |
| 58 | |
| 59 | /* Command support defines */ |
| 60 | #define CONFIG_CMD_PING |
| 61 | #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ |
| 62 | |
Vikas Manocha | c55e759 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 63 | #define CONFIG_SYS_MEMTEST_START 0x0000 |
| 64 | #define CONFIG_SYS_MEMTEST_END 1024*1024 |
| 65 | #define CONFIG_CMD_MEMTEST |
| 66 | |
| 67 | /* Misc configuration */ |
| 68 | #define CONFIG_SYS_LONGHELP |
| 69 | #define CONFIG_CMDLINE_EDITING |
| 70 | |
| 71 | #define CONFIG_BOOTDELAY 3 |
| 72 | #define CONFIG_BOOTCOMMAND "go 0x40040000" |
Stefan Roese | d126e01 | 2015-05-18 14:08:23 +0200 | [diff] [blame] | 73 | |
Vikas Manocha | e67abca | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 74 | /* |
| 75 | + * QSPI support |
| 76 | + */ |
| 77 | #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ |
Vikas Manocha | e67abca | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 78 | #define CONFIG_CQSPI_DECODER 0 |
| 79 | #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 |
| 80 | #define CONFIG_CMD_SPI |
| 81 | |
Vikas Manocha | e67abca | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 82 | #define CONFIG_CMD_SF |
| 83 | #endif |
| 84 | |
Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 85 | #endif /* __CONFIG_H */ |