Marek Vasut | d88995a | 2015-08-03 01:37:28 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_SOCFPGA=y | ||||
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
4 | CONFIG_SPL_DM=y | ||||
5 | CONFIG_DM_GPIO=y | ||||
Marek Vasut | d88995a | 2015-08-03 01:37:28 +0200 | [diff] [blame] | 6 | CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y |
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 7 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
Marek Vasut | d88995a | 2015-08-03 01:37:28 +0200 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" |
9 | CONFIG_SPL=y | ||||
Marek Vasut | d88995a | 2015-08-03 01:37:28 +0200 | [diff] [blame] | 10 | CONFIG_SPL_STACK_R=y |
Simon Glass | 73223f0 | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 11 | CONFIG_FIT=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 12 | # CONFIG_CMD_IMLS is not set |
13 | # CONFIG_CMD_FLASH is not set | ||||
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 14 | CONFIG_CMD_GPIO=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 15 | CONFIG_DWAPB_GPIO=y |
Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 16 | CONFIG_DM_MMC=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 17 | CONFIG_DM_ETH=y |
18 | CONFIG_ETH_DESIGNWARE=y | ||||
Thomas Chou | 9e39003 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 19 | CONFIG_SYS_NS16550=y |
Bin Meng | e5d5d44 | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 20 | CONFIG_CADENCE_QSPI=y |
21 | CONFIG_DESIGNWARE_SPI=y | ||||
Marek Vasut | 9368aa6 | 2015-12-05 19:24:22 +0100 | [diff] [blame] | 22 | CONFIG_USB=y |
23 | CONFIG_DM_USB=y |