Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010-2011 Calxeda, Inc. |
| 3 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
Rob Herring | ac9ae13 | 2014-04-10 16:17:30 -0500 | [diff] [blame] | 10 | #include <config_distro_defaults.h> |
| 11 | |
Rob Herring | 185a5bb | 2013-06-12 22:24:47 -0500 | [diff] [blame] | 12 | #define CONFIG_SYS_DCACHE_OFF |
Rob Herring | 185a5bb | 2013-06-12 22:24:47 -0500 | [diff] [blame] | 13 | #define CONFIG_SYS_THUMB_BUILD |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 14 | |
| 15 | #define CONFIG_SYS_NO_FLASH |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 16 | |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 17 | #define CONFIG_OF_BOARD_SETUP |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 18 | #define CONFIG_FIT |
| 19 | #define CONFIG_SYS_BOOTMAPSZ (16 << 20) |
| 20 | |
Rob Herring | 9df1bd4 | 2013-10-04 10:22:43 -0500 | [diff] [blame] | 21 | #define CONFIG_SYS_TIMER_RATE (150000000/256) |
| 22 | #define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4) |
| 23 | #define CONFIG_SYS_TIMER_COUNTS_DOWN |
| 24 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 25 | /* |
| 26 | * Size of malloc() pool |
| 27 | */ |
| 28 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024) |
| 29 | |
| 30 | #define CONFIG_PL011_SERIAL |
| 31 | #define CONFIG_PL011_CLOCK 150000000 |
| 32 | #define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } |
| 33 | #define CONFIG_CONS_INDEX 0 |
| 34 | |
Rob Herring | 185a5bb | 2013-06-12 22:24:47 -0500 | [diff] [blame] | 35 | #define CONFIG_BAUDRATE 115200 |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 36 | |
Rob Herring | 877012d | 2012-02-01 16:57:54 +0000 | [diff] [blame] | 37 | #define CONFIG_BOOTCOUNT_LIMIT |
Stefan Roese | 0044c42 | 2012-08-16 17:55:41 +0000 | [diff] [blame] | 38 | #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD |
| 39 | #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ |
Rob Herring | 877012d | 2012-02-01 16:57:54 +0000 | [diff] [blame] | 40 | #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c |
| 41 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 42 | #define CONFIG_MISC_INIT_R |
Rob Herring | 344ca0b | 2013-08-24 10:10:54 -0500 | [diff] [blame] | 43 | #define CONFIG_LIBATA |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 44 | #define CONFIG_SCSI_AHCI |
| 45 | #define CONFIG_SCSI_AHCI_PLAT |
| 46 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 |
| 47 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 48 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 49 | CONFIG_SYS_SCSI_MAX_LUN) |
| 50 | |
Rob Herring | 9a42098 | 2011-12-15 11:15:50 +0000 | [diff] [blame] | 51 | #define CONFIG_CALXEDA_XGMAC |
| 52 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 53 | /* |
| 54 | * Command line configuration. |
| 55 | */ |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 56 | #define CONFIG_CMD_SCSI |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 57 | |
Rob Herring | e1df283 | 2013-06-12 22:24:51 -0500 | [diff] [blame] | 58 | #define CONFIG_BOOT_RETRY_TIME -1 |
| 59 | #define CONFIG_RESET_TO_RETRY |
Stefan Roese | d126e01 | 2015-05-18 14:08:23 +0200 | [diff] [blame] | 60 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 61 | /* |
| 62 | * Miscellaneous configurable options |
| 63 | */ |
Rob Herring | 185a5bb | 2013-06-12 22:24:47 -0500 | [diff] [blame] | 64 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 65 | #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ |
| 66 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 67 | /* Print Buffer Size */ |
| 68 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 69 | sizeof(CONFIG_SYS_PROMPT)+16) |
| 70 | |
| 71 | #define CONFIG_SYS_LOAD_ADDR 0x800000 |
Rob Herring | 185a5bb | 2013-06-12 22:24:47 -0500 | [diff] [blame] | 72 | #define CONFIG_SYS_64BIT_LBA |
| 73 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 74 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 75 | /*----------------------------------------------------------------------- |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 76 | * Physical Memory Map |
Rob Herring | 32b4a8a | 2015-06-21 00:29:55 +0100 | [diff] [blame] | 77 | * The DRAM is already setup, so do not touch the DT node later. |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 78 | */ |
Rob Herring | 32b4a8a | 2015-06-21 00:29:55 +0100 | [diff] [blame] | 79 | #define CONFIG_NR_DRAM_BANKS 0 |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 80 | #define PHYS_SDRAM_1_SIZE (4089 << 20) |
| 81 | #define CONFIG_SYS_MEMTEST_START 0x100000 |
| 82 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) |
| 83 | |
Jason Hobbs | a34e854 | 2012-02-01 16:57:56 +0000 | [diff] [blame] | 84 | /* Environment data setup |
| 85 | */ |
| 86 | #define CONFIG_ENV_IS_IN_NVRAM |
| 87 | #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ |
| 88 | #define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ |
| 89 | #define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */ |
| 90 | #define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 91 | |
| 92 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
Rob Herring | 7b81649 | 2012-02-01 16:57:53 +0000 | [diff] [blame] | 93 | #define CONFIG_SYS_TEXT_BASE 0x00008000 |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 94 | #define CONFIG_SYS_INIT_SP_ADDR 0x01000000 |
| 95 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 96 | |
| 97 | #endif |