Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003-2004 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | |
| 25 | /************************************************************************* |
| 26 | * (c) 2005 esd gmbh Hannover |
| 27 | * |
| 28 | * |
| 29 | * from IceCube.h file |
| 30 | * by Reinhard Arlt reinhard.arlt@esd-electronics.com |
| 31 | * |
| 32 | *************************************************************************/ |
| 33 | |
| 34 | #ifndef __CONFIG_H |
| 35 | #define __CONFIG_H |
| 36 | |
| 37 | /* |
| 38 | * High Level Configuration Options |
| 39 | * (easy to change) |
| 40 | */ |
| 41 | |
| 42 | #define CONFIG_MPC5200 1 /* This is an MPC5xxx CPU */ |
| 43 | #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
| 44 | #define CONFIG_ICECUBE 1 /* ... on IceCube board */ |
| 45 | #define CONFIG_MECP5200 1 /* ... on MECP5200 board */ |
| 46 | #define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */ |
| 47 | |
| 48 | #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ |
| 49 | |
| 50 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
| 51 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ |
| 52 | |
Becky Bruce | 31d8267 | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 53 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 54 | |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 55 | /* |
| 56 | * Serial console configuration |
| 57 | */ |
| 58 | #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
| 59 | #if 0 /* test-only */ |
| 60 | #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
| 61 | #else |
| 62 | #define CONFIG_BAUDRATE 9600 /* ... at 115200 bps */ |
| 63 | #endif |
| 64 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
| 65 | |
| 66 | |
| 67 | #ifdef CONFIG_MPC5200 /* MPC5100 PCI is not supported yet. */ |
| 68 | |
| 69 | #define CONFIG_MII |
| 70 | #if 0 /* test-only !!! */ |
| 71 | #define CONFIG_NET_MULTI 1 |
| 72 | #define CONFIG_EEPRO100 1 |
| 73 | #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ |
| 74 | #define CONFIG_NS8382X 1 |
| 75 | #endif |
| 76 | |
| 77 | #else /* MPC5100 */ |
| 78 | |
| 79 | #endif |
| 80 | |
| 81 | /* Partitions */ |
| 82 | #define CONFIG_MAC_PARTITION |
| 83 | #define CONFIG_DOS_PARTITION |
| 84 | |
| 85 | /* USB */ |
| 86 | #if 0 |
| 87 | #define CONFIG_USB_OHCI |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 88 | #define CONFIG_USB_STORAGE |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 89 | #endif |
| 90 | |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 91 | |
Jon Loeliger | d794cfe | 2007-07-04 22:31:15 -0500 | [diff] [blame] | 92 | /* |
Jon Loeliger | 7f5c015 | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 93 | * BOOTP options |
| 94 | */ |
| 95 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 96 | #define CONFIG_BOOTP_BOOTPATH |
| 97 | #define CONFIG_BOOTP_GATEWAY |
| 98 | #define CONFIG_BOOTP_HOSTNAME |
| 99 | |
| 100 | |
| 101 | /* |
Jon Loeliger | d794cfe | 2007-07-04 22:31:15 -0500 | [diff] [blame] | 102 | * Command line configuration. |
| 103 | */ |
| 104 | #include <config_cmd_default.h> |
| 105 | |
| 106 | #define CONFIG_CMD_EEPROM |
| 107 | #define CONFIG_CMD_FAT |
| 108 | #define CONFIG_CMD_EXT2 |
| 109 | #define CONFIG_CMD_I2C |
| 110 | #define CONFIG_CMD_IDE |
| 111 | #define CONFIG_CMD_BSP |
| 112 | #define CONFIG_CMD_ELF |
| 113 | |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 114 | |
| 115 | #if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */ |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 116 | # define CFG_LOWBOOT 1 |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 117 | # define CFG_LOWBOOT16 1 |
| 118 | #endif |
| 119 | #if (TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */ |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 120 | # define CFG_LOWBOOT 1 |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 121 | # define CFG_LOWBOOT08 1 |
| 122 | #endif |
| 123 | |
| 124 | /* |
| 125 | * Autobooting |
| 126 | */ |
| 127 | #define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */ |
| 128 | |
| 129 | #define CONFIG_PREBOOT "echo;" \ |
| 130 | "echo Welcome to CBX-CPU5200 (mecp5200);" \ |
| 131 | "echo" |
| 132 | |
| 133 | #undef CONFIG_BOOTARGS |
| 134 | |
| 135 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 136 | "netdev=eth0\0" \ |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 137 | "flash_vxworks0=run ata_vxworks_args;setenv loadaddr ff000000;bootvx\0" \ |
| 138 | "flash_vxworks1=run ata_vxworks_args;setenv loadaddr ff200000:bootvx\0" \ |
| 139 | "net_vxworks=tftp $(loadaddr) $(image);run vxworks_args;bootvx\0" \ |
| 140 | "vxworks_args=setenv bootargs fec(0,0)$(host):$(image) h=$(serverip) e=$(ipaddr) g=$(gatewayip) u=$(user) $(pass) tn=$(target) s=$(script)\0" \ |
| 141 | "ata_vxworks_args=setenv bootargs /ata0/vxWorks h=$(serverip) e=$(ipaddr) g=$(gatewayip) u=$(user) $(pass) tn=$(target) s=$(script) o=fec0 \0" \ |
| 142 | "loadaddr=01000000\0" \ |
| 143 | "serverip=192.168.2.99\0" \ |
| 144 | "gatewayip=10.0.0.79\0" \ |
| 145 | "user=mu\0" \ |
| 146 | "target=mecp5200.esd\0" \ |
| 147 | "script=mecp5200.bat\0" \ |
| 148 | "image=/tftpboot/vxWorks_mecp5200\0" \ |
| 149 | "ipaddr=10.0.13.196\0" \ |
| 150 | "netmask=255.255.0.0\0" \ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 151 | "" |
| 152 | |
| 153 | #define CONFIG_BOOTCOMMAND "run flash_vxworks0" |
| 154 | |
| 155 | #if defined(CONFIG_MPC5200) |
| 156 | /* |
| 157 | * IPB Bus clocking configuration. |
| 158 | */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 159 | #undef CFG_IPBSPEED_133 /* define for 133MHz speed */ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 160 | #endif |
| 161 | /* |
| 162 | * I2C configuration |
| 163 | */ |
| 164 | #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
| 165 | #define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */ |
| 166 | |
| 167 | #define CFG_I2C_SPEED 86000 /* 100 kHz */ |
| 168 | #define CFG_I2C_SLAVE 0x7F |
| 169 | |
| 170 | /* |
| 171 | * EEPROM configuration |
| 172 | */ |
| 173 | #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ |
| 174 | #define CFG_I2C_EEPROM_ADDR_LEN 2 |
| 175 | #define CFG_EEPROM_PAGE_WRITE_BITS 5 |
| 176 | #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20 |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 177 | #define CFG_I2C_MULTI_EEPROMS 1 |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 178 | /* |
| 179 | * Flash configuration |
| 180 | */ |
| 181 | #define CFG_FLASH_BASE 0xFFC00000 |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 182 | #define CFG_FLASH_SIZE 0x00400000 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 183 | #define CONFIG_ENV_ADDR (CFG_FLASH_BASE + 0x003E0000) |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 184 | #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ |
| 185 | #define CFG_MAX_FLASH_SECT 512 |
| 186 | |
| 187 | #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
| 188 | #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
| 189 | |
| 190 | /* |
| 191 | * Environment settings |
| 192 | */ |
| 193 | #if 1 /* test-only */ |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 194 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 195 | #define CONFIG_ENV_SIZE 0x10000 |
| 196 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 197 | #define CONFIG_ENV_OVERWRITE 1 |
| 198 | #else |
Jean-Christophe PLAGNIOL-VILLARD | bb1f8b4 | 2008-09-05 09:19:30 +0200 | [diff] [blame] | 199 | #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 200 | #define CONFIG_ENV_OFFSET 0x0000 /* environment starts at the beginning of the EEPROM */ |
| 201 | #define CONFIG_ENV_SIZE 0x0400 /* 8192 bytes may be used for env vars*/ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 202 | /* total size of a CAT24WC32 is 8192 bytes */ |
| 203 | #define CONFIG_ENV_OVERWRITE 1 |
| 204 | #endif |
| 205 | |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 206 | #define CONFIG_FLASH_CFI_DRIVER 1 /* Flash is CFI conformant */ |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 207 | #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */ |
| 208 | #define CFG_FLASH_PROTECTION 1 /* use hardware protection */ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 209 | #if 0 |
| 210 | #define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ |
| 211 | #endif |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 212 | #define CFG_FLASH_INCREMENT 0x00400000 /* size of flash bank */ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 213 | #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 214 | #define CFG_FLASH_EMPTY_INFO 1 /* show if bank is empty */ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 215 | |
| 216 | |
| 217 | /* |
| 218 | * Memory map |
| 219 | */ |
| 220 | #define CFG_MBAR 0xF0000000 |
| 221 | #define CFG_SDRAM_BASE 0x00000000 |
| 222 | #define CFG_DEFAULT_MBAR 0x80000000 |
| 223 | |
| 224 | /* Use SRAM until RAM will be available */ |
| 225 | #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM |
| 226 | #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ |
| 227 | |
| 228 | |
| 229 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 230 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
| 231 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
| 232 | |
| 233 | #define CFG_MONITOR_BASE TEXT_BASE |
| 234 | #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) |
| 235 | # define CFG_RAMBOOT 1 |
| 236 | #endif |
| 237 | |
| 238 | #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ |
| 239 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 240 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
| 241 | |
| 242 | /* |
| 243 | * Ethernet configuration |
| 244 | */ |
| 245 | #define CONFIG_MPC5xxx_FEC 1 |
| 246 | /* |
| 247 | * Define CONFIG_FEC_10MBIT to force FEC at 10Mb |
| 248 | */ |
| 249 | /* #define CONFIG_FEC_10MBIT 1 */ |
| 250 | #define CONFIG_PHY_ADDR 0x00 |
| 251 | #define CONFIG_UDP_CHECKSUM 1 |
| 252 | |
| 253 | |
| 254 | /* |
| 255 | * GPIO configuration |
| 256 | */ |
| 257 | #define CFG_GPS_PORT_CONFIG 0x01052444 |
| 258 | |
| 259 | /* |
| 260 | * Miscellaneous configurable options |
| 261 | */ |
| 262 | #define CFG_LONGHELP /* undef to save memory */ |
| 263 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
Jon Loeliger | d794cfe | 2007-07-04 22:31:15 -0500 | [diff] [blame] | 264 | #if defined(CONFIG_CMD_KGDB) |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 265 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 266 | #else |
| 267 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 268 | #endif |
| 269 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 270 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 271 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 272 | |
| 273 | #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ |
| 274 | #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
| 275 | |
| 276 | #define CFG_LOAD_ADDR 0x100000 /* default load address */ |
| 277 | |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 278 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 279 | |
| 280 | #define CFG_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */ |
| 281 | |
Jon Loeliger | d794cfe | 2007-07-04 22:31:15 -0500 | [diff] [blame] | 282 | #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
| 283 | #if defined(CONFIG_CMD_KGDB) |
| 284 | # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
| 285 | #endif |
| 286 | |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 287 | /* |
| 288 | * Various low-level settings |
| 289 | */ |
| 290 | #if defined(CONFIG_MPC5200) |
| 291 | #define CFG_HID0_INIT HID0_ICE | HID0_ICFI |
| 292 | #define CFG_HID0_FINAL HID0_ICE |
| 293 | #else |
| 294 | #define CFG_HID0_INIT 0 |
| 295 | #define CFG_HID0_FINAL 0 |
| 296 | #endif |
| 297 | |
| 298 | #define CFG_BOOTCS_START CFG_FLASH_BASE |
| 299 | #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE |
| 300 | #define CFG_BOOTCS_CFG 0x00085d00 |
| 301 | |
| 302 | #define CFG_CS0_START CFG_FLASH_BASE |
| 303 | #define CFG_CS0_SIZE CFG_FLASH_SIZE |
| 304 | |
| 305 | #define CFG_CS1_START 0xfd000000 |
| 306 | #define CFG_CS1_SIZE 0x00010000 |
| 307 | #define CFG_CS1_CFG 0x10101410 |
| 308 | |
| 309 | #define CFG_CS_BURST 0x00000000 |
| 310 | #define CFG_CS_DEADCYCLE 0x33333333 |
| 311 | |
| 312 | #define CFG_RESET_ADDRESS 0xff000000 |
| 313 | |
| 314 | /*----------------------------------------------------------------------- |
| 315 | * USB stuff |
| 316 | *----------------------------------------------------------------------- |
| 317 | */ |
| 318 | #define CONFIG_USB_CLOCK 0x0001BBBB |
| 319 | #define CONFIG_USB_CONFIG 0x00001000 |
| 320 | |
| 321 | /*----------------------------------------------------------------------- |
| 322 | * IDE/ATA stuff Supports IDE harddisk |
| 323 | *----------------------------------------------------------------------- |
| 324 | */ |
| 325 | |
| 326 | #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ |
| 327 | |
| 328 | #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ |
| 329 | #undef CONFIG_IDE_LED /* LED for ide not supported */ |
| 330 | |
| 331 | #define CONFIG_IDE_RESET /* reset for ide supported */ |
| 332 | #define CONFIG_IDE_PREINIT |
| 333 | |
| 334 | #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ |
| 335 | #define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ |
| 336 | |
| 337 | #define CFG_ATA_IDE0_OFFSET 0x0000 |
| 338 | |
| 339 | #define CFG_ATA_BASE_ADDR MPC5XXX_ATA |
| 340 | |
| 341 | /* Offset for data I/O */ |
| 342 | #define CFG_ATA_DATA_OFFSET (0x0060) |
| 343 | |
| 344 | /* Offset for normal register accesses */ |
| 345 | #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) |
| 346 | |
| 347 | /* Offset for alternate registers */ |
| 348 | #define CFG_ATA_ALT_OFFSET (0x005C) |
| 349 | |
Wolfgang Denk | 7435711 | 2007-02-27 14:26:04 +0100 | [diff] [blame] | 350 | /* Interval between registers */ |
| 351 | #define CFG_ATA_STRIDE 4 |
Stefan Roese | 8b7d1f0 | 2007-01-31 16:37:34 +0100 | [diff] [blame] | 352 | |
| 353 | #endif /* __CONFIG_H */ |