wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003-2005 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
| 11 | /* |
| 12 | * High Level Configuration Options |
| 13 | * (easy to change) |
| 14 | */ |
| 15 | |
| 16 | #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
| 17 | #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ |
| 18 | #define CONFIG_HMI1001 1 /* HMI1001 board */ |
| 19 | |
Wolfgang Denk | 2ae1824 | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 20 | #ifndef CONFIG_SYS_TEXT_BASE |
| 21 | #define CONFIG_SYS_TEXT_BASE 0xFFF00000 |
| 22 | #endif |
| 23 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 24 | #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 25 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 26 | #define CONFIG_BOARD_EARLY_INIT_R |
| 27 | |
Becky Bruce | 31d8267 | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 28 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 29 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 30 | /* |
| 31 | * Serial console configuration |
| 32 | */ |
| 33 | #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
| 34 | #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 35 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 36 | |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 37 | /* Partitions */ |
| 38 | #define CONFIG_DOS_PARTITION |
| 39 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 40 | |
Jon Loeliger | 48d5d10 | 2007-07-04 22:32:25 -0500 | [diff] [blame] | 41 | /* |
Jon Loeliger | 7f5c015 | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 42 | * BOOTP options |
| 43 | */ |
| 44 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 45 | #define CONFIG_BOOTP_BOOTPATH |
| 46 | #define CONFIG_BOOTP_GATEWAY |
| 47 | #define CONFIG_BOOTP_HOSTNAME |
| 48 | |
| 49 | |
| 50 | /* |
Jon Loeliger | 48d5d10 | 2007-07-04 22:32:25 -0500 | [diff] [blame] | 51 | * Command line configuration. |
| 52 | */ |
| 53 | #include <config_cmd_default.h> |
| 54 | |
| 55 | #define CONFIG_CMD_DATE |
| 56 | #define CONFIG_CMD_DISPLAY |
| 57 | #define CONFIG_CMD_DHCP |
| 58 | #define CONFIG_CMD_EEPROM |
| 59 | #define CONFIG_CMD_I2C |
| 60 | #define CONFIG_CMD_IDE |
| 61 | #define CONFIG_CMD_NFS |
| 62 | #define CONFIG_CMD_PCI |
| 63 | #define CONFIG_CMD_SNTP |
| 64 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 65 | |
| 66 | #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ |
| 67 | |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 68 | #if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 69 | # define CONFIG_SYS_LOWBOOT 1 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 70 | #endif |
| 71 | |
| 72 | /* |
| 73 | * Autobooting |
| 74 | */ |
| 75 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
| 76 | |
| 77 | #define CONFIG_PREBOOT "echo;" \ |
Wolfgang Denk | 32bf3d1 | 2008-03-03 12:16:44 +0100 | [diff] [blame] | 78 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 79 | "echo" |
| 80 | |
| 81 | #undef CONFIG_BOOTARGS |
| 82 | |
| 83 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 84 | "netdev=eth0\0" \ |
| 85 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 86 | "nfsroot=${serverip}:${rootpath}\0" \ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 87 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 88 | "addip=setenv bootargs ${bootargs} " \ |
| 89 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 90 | ":${hostname}:${netdev}:off panic=1\0" \ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 91 | "flash_nfs=run nfsargs addip;" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 92 | "bootm ${kernel_addr}\0" \ |
| 93 | "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 94 | "rootpath=/opt/eldk/ppc_82xx\0" \ |
| 95 | "" |
| 96 | |
| 97 | #define CONFIG_BOOTCOMMAND "run net_nfs" |
| 98 | |
Wolfgang Denk | 9f96ae4 | 2005-08-30 13:04:12 +0200 | [diff] [blame] | 99 | #define CONFIG_MISC_INIT_R 1 |
| 100 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 101 | /* |
| 102 | * IPB Bus clocking configuration. |
| 103 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 104 | #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 105 | |
| 106 | /* |
wdenk | 342717f | 2005-06-27 13:30:03 +0000 | [diff] [blame] | 107 | * I2C configuration |
| 108 | */ |
| 109 | #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 110 | #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ |
wdenk | 342717f | 2005-06-27 13:30:03 +0000 | [diff] [blame] | 111 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 112 | #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ |
| 113 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
wdenk | 342717f | 2005-06-27 13:30:03 +0000 | [diff] [blame] | 114 | |
| 115 | /* |
| 116 | * EEPROM configuration |
| 117 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 118 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x58 |
| 119 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 120 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 |
| 121 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 |
wdenk | 342717f | 2005-06-27 13:30:03 +0000 | [diff] [blame] | 122 | |
| 123 | /* |
| 124 | * RTC configuration |
| 125 | */ |
| 126 | #define CONFIG_RTC_PCF8563 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_I2C_RTC_ADDR 0x51 |
wdenk | 342717f | 2005-06-27 13:30:03 +0000 | [diff] [blame] | 128 | |
| 129 | /* |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 130 | * Flash configuration |
| 131 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | #define CONFIG_SYS_FLASH_BASE 0xFF800000 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 133 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ |
| 135 | #define CONFIG_SYS_MAX_FLASH_SECT 67 /* max num of sects on one chip */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 136 | |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 137 | #define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 139 | (= chip selects) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
| 141 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 142 | |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 143 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 144 | #define CONFIG_SYS_FLASH_CFI |
| 145 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
| 146 | #define CONFIG_SYS_FLASH_CFI_AMD_RESET |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 147 | |
| 148 | /* |
| 149 | * Environment settings |
| 150 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 151 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 152 | #define CONFIG_ENV_SIZE 0x4000 |
| 153 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| 154 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE) |
| 155 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 156 | |
| 157 | /* |
| 158 | * Memory map |
| 159 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | #define CONFIG_SYS_MBAR 0xF0000000 |
| 161 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 162 | #define CONFIG_SYS_DEFAULT_MBAR 0x80000000 |
| 163 | #define CONFIG_SYS_DISPLAY_BASE 0x80600000 |
| 164 | #define CONFIG_SYS_STATUS1_BASE 0x80600200 |
| 165 | #define CONFIG_SYS_STATUS2_BASE 0x80600300 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 166 | |
| 167 | /* Settings for XLB = 132 MHz */ |
| 168 | #define SDRAM_DDR 1 |
| 169 | #define SDRAM_MODE 0x018D0000 |
| 170 | #define SDRAM_EMODE 0x40090000 |
| 171 | #define SDRAM_CONTROL 0x714f0f00 |
| 172 | #define SDRAM_CONFIG1 0x73722930 |
| 173 | #define SDRAM_CONFIG2 0x47770000 |
| 174 | #define SDRAM_TAPDELAY 0x10000000 |
| 175 | |
| 176 | /* Use ON-Chip SRAM until RAM will be available */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 177 | #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM |
Michael Zaidman | 800eb09 | 2010-09-20 08:51:53 +0200 | [diff] [blame] | 178 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 179 | /* preserve space for the post_word at end of on-chip SRAM */ |
Michael Zaidman | 800eb09 | 2010-09-20 08:51:53 +0200 | [diff] [blame] | 180 | #define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) |
| 181 | |
| 182 | #ifdef CONFIG_POST |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 183 | #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 184 | #else |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 185 | #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 186 | #endif |
| 187 | |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 188 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 189 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 190 | |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 191 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
| 193 | # define CONFIG_SYS_RAMBOOT 1 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 194 | #endif |
| 195 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 196 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ |
| 197 | #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 128 kB for malloc() */ |
| 198 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 199 | |
| 200 | /* |
| 201 | * Ethernet configuration |
| 202 | */ |
| 203 | #define CONFIG_MPC5xxx_FEC 1 |
Ben Warren | 86321fc | 2009-02-05 23:58:25 -0800 | [diff] [blame] | 204 | #define CONFIG_MPC5xxx_FEC_MII100 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 205 | #define CONFIG_PHY_ADDR 0x00 |
Wolfgang Denk | 8d7e273 | 2007-03-07 16:19:46 +0100 | [diff] [blame] | 206 | #define CONFIG_MII 1 /* MII PHY management */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 207 | |
| 208 | /* |
| 209 | * GPIO configuration |
| 210 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 211 | #define CONFIG_SYS_GPS_PORT_CONFIG 0x01051004 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 212 | |
| 213 | /* |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 214 | * Miscellaneous configurable options |
| 215 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 216 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 217 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
Jon Loeliger | 48d5d10 | 2007-07-04 22:32:25 -0500 | [diff] [blame] | 218 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 219 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 220 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 221 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 222 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 223 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 224 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 225 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 226 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 227 | #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
Jon Loeliger | 48d5d10 | 2007-07-04 22:32:25 -0500 | [diff] [blame] | 228 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 229 | # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
Jon Loeliger | 48d5d10 | 2007-07-04 22:32:25 -0500 | [diff] [blame] | 230 | #endif |
| 231 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 232 | /* Enable an alternate, more extensive memory test */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 233 | #define CONFIG_SYS_ALT_MEMTEST |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 234 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 235 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
| 236 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 237 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 238 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 239 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 240 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 241 | |
| 242 | /* |
Jon Loeliger | 7f5c015 | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 243 | * Enable loopw command. |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 244 | */ |
| 245 | #define CONFIG_LOOPW |
| 246 | |
| 247 | /* |
| 248 | * Various low-level settings |
| 249 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 250 | #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI |
| 251 | #define CONFIG_SYS_HID0_FINAL HID0_ICE |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 252 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 253 | #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE |
| 254 | #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE |
| 255 | #define CONFIG_SYS_BOOTCS_CFG 0x0004FB00 |
| 256 | #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE |
| 257 | #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 258 | |
| 259 | /* 8Mbit SRAM @0x80100000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 260 | #define CONFIG_SYS_CS1_START 0x80100000 |
| 261 | #define CONFIG_SYS_CS1_SIZE 0x00100000 |
| 262 | #define CONFIG_SYS_CS1_CFG 0x19B00 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 263 | |
| 264 | /* FRAM 32Kbyte @0x80700000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 265 | #define CONFIG_SYS_CS2_START 0x80700000 |
| 266 | #define CONFIG_SYS_CS2_SIZE 0x00008000 |
| 267 | #define CONFIG_SYS_CS2_CFG 0x19800 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 268 | |
| 269 | /* Display H1, Status Inputs, EPLD @0x80600000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 270 | #define CONFIG_SYS_CS3_START 0x80600000 |
| 271 | #define CONFIG_SYS_CS3_SIZE 0x00100000 |
| 272 | #define CONFIG_SYS_CS3_CFG 0x00019800 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 273 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 274 | #define CONFIG_SYS_CS_BURST 0x00000000 |
| 275 | #define CONFIG_SYS_CS_DEADCYCLE 0x33333333 |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 276 | |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 277 | /*----------------------------------------------------------------------- |
| 278 | * IDE/ATA stuff Supports IDE harddisk |
| 279 | *----------------------------------------------------------------------- |
| 280 | */ |
| 281 | |
| 282 | #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ |
| 283 | |
| 284 | #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ |
| 285 | #undef CONFIG_IDE_LED /* LED for ide not supported */ |
| 286 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 287 | #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ |
| 288 | #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */ |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 289 | |
Wolfgang Denk | 9d3338d | 2005-08-10 10:06:25 +0200 | [diff] [blame] | 290 | #define CONFIG_IDE_PREINIT 1 |
| 291 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 292 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 293 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 294 | #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 295 | |
| 296 | /* Offset for data I/O */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 297 | #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060) |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 298 | |
| 299 | /* Offset for normal register accesses */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 300 | #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 301 | |
| 302 | /* Offset for alternate registers */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 303 | #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C) |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 304 | |
| 305 | /* Interval between registers */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 306 | #define CONFIG_SYS_ATA_STRIDE 4 |
Wolfgang Denk | 08abe15 | 2005-07-21 15:23:29 +0200 | [diff] [blame] | 307 | |
| 308 | #define CONFIG_ATAPI 1 |
| 309 | |
Wolfgang Denk | ccd9d3d | 2005-09-03 01:21:50 +0200 | [diff] [blame] | 310 | #define CONFIG_VIDEO_SMI_LYNXEM |
| 311 | #define CONFIG_CFB_CONSOLE |
| 312 | #define CONFIG_VGA_AS_SINGLE_DEVICE |
| 313 | #define CONFIG_VIDEO_LOGO |
| 314 | |
Wolfgang Denk | 98128f3 | 2005-08-16 15:17:53 +0200 | [diff] [blame] | 315 | /* |
| 316 | * PCI Mapping: |
| 317 | * 0x40000000 - 0x4fffffff - PCI Memory |
| 318 | * 0x50000000 - 0x50ffffff - PCI IO Space |
| 319 | */ |
| 320 | #define CONFIG_PCI 1 |
| 321 | #define CONFIG_PCI_PNP 1 |
| 322 | #define CONFIG_PCI_SCAN_SHOW 1 |
TsiChung Liew | f33fca2 | 2008-03-30 01:19:06 -0500 | [diff] [blame] | 323 | #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 |
Wolfgang Denk | 98128f3 | 2005-08-16 15:17:53 +0200 | [diff] [blame] | 324 | |
| 325 | #define CONFIG_PCI_MEM_BUS 0x40000000 |
| 326 | #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS |
| 327 | #define CONFIG_PCI_MEM_SIZE 0x10000000 |
| 328 | |
| 329 | #define CONFIG_PCI_IO_BUS 0x50000000 |
| 330 | #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS |
| 331 | #define CONFIG_PCI_IO_SIZE 0x01000000 |
| 332 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 333 | #define CONFIG_SYS_ISA_IO CONFIG_PCI_IO_BUS |
Wolfgang Denk | ccd9d3d | 2005-09-03 01:21:50 +0200 | [diff] [blame] | 334 | |
Wolfgang Denk | 9f96ae4 | 2005-08-30 13:04:12 +0200 | [diff] [blame] | 335 | /*---------------------------------------------------------------------*/ |
| 336 | /* Display addresses */ |
| 337 | /*---------------------------------------------------------------------*/ |
| 338 | |
Ilya Yanok | 7f0d241 | 2010-09-09 23:03:32 +0200 | [diff] [blame] | 339 | #define CONFIG_PDSP188x |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 340 | #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38) |
| 341 | #define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30) |
Wolfgang Denk | 9f96ae4 | 2005-08-30 13:04:12 +0200 | [diff] [blame] | 342 | |
wdenk | a87589d | 2005-06-10 10:00:19 +0000 | [diff] [blame] | 343 | #endif /* __CONFIG_H */ |