blob: 32f8773b241eda0bda9409ee819498d77e0cdb99 [file] [log] [blame]
Peng Fan3f2b4d72021-08-07 16:01:13 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2020 NXP
4 */
5
6#ifndef __IMX8ULP_EVK_H
7#define __IMX8ULP_EVK_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
12#define CONFIG_SYS_BOOTM_LEN (SZ_64M)
13#define CONFIG_SPL_MAX_SIZE (148 * 1024)
14#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
15#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
16#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
17#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
18#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
19
20#ifdef CONFIG_SPL_BUILD
21#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
22#define CONFIG_SPL_STACK 0x22050000
23#define CONFIG_SPL_BSS_START_ADDR 0x22048000
24#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
25#define CONFIG_SYS_SPL_MALLOC_START 0x22040000
26#define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */
27
28#define CONFIG_MALLOC_F_ADDR 0x22040000
29
30#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x95000000 /* SPL_RAM needed */
31
32#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
33
34#endif
35
36#define CONFIG_SERIAL_TAG
37
38#define CONFIG_REMAKE_ELF
39
40#define CONFIG_BOARD_EARLY_INIT_F
41#define CONFIG_BOARD_LATE_INIT
42
43/* ENET Config */
44#if defined(CONFIG_FEC_MXC)
45#define CONFIG_ETHPRIME "FEC"
46#define PHY_ANEG_TIMEOUT 20000
47
48#define CONFIG_FEC_XCV_TYPE RMII
49#define CONFIG_FEC_MXC_PHYADDR 1
50
51#define IMX_FEC_BASE 0x29950000
52#endif
53
54#ifdef CONFIG_DISTRO_DEFAULTS
55#define BOOT_TARGET_DEVICES(func) \
56 func(MMC, mmc, 0)
57
58#include <config_distro_bootcmd.h>
59#else
60#define BOOTENV
61#endif
62
63/* Initial environment variables */
64#define CONFIG_EXTRA_ENV_SETTINGS \
65 BOOTENV \
66 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
67 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
68 "image=Image\0" \
69 "console=ttyLP1,115200 earlycon\0" \
70 "fdt_addr_r=0x83000000\0" \
71 "boot_fit=no\0" \
72 "fdtfile=imx8ulp-evk.dtb\0" \
73 "initrd_addr=0x83800000\0" \
74 "bootm_size=0x10000000\0" \
75 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
76 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
77
78/* Link Definitions */
79#define CONFIG_LOADADDR 0x80480000
80
81#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
82
83#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
84#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
85#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
86#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
87
88#define CONFIG_ENV_OVERWRITE
89#define CONFIG_MMCROOT "/dev/mmcblk2p2"
90
91/* Size of malloc() pool */
92#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_16M)
93
94#define CONFIG_SYS_SDRAM_BASE 0x80000000
95#define PHYS_SDRAM 0x80000000
96#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
97
98/* Monitor Command Prompt */
99#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
100#define CONFIG_SYS_CBSIZE 2048
101#define CONFIG_SYS_MAXARGS 64
102#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
103#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
104
105/* Using ULP WDOG for reset */
106#define WDOG_BASE_ADDR WDG3_RBASE
107#endif