Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * board.c |
| 4 | * |
| 5 | * Board functions for Bosch Guardian |
| 6 | * |
Nishanth Menon | a94a407 | 2023-11-01 15:56:03 -0500 | [diff] [blame] | 7 | * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 8 | * Copyright (C) 2018 Robert Bosch Power Tools GmbH |
| 9 | */ |
| 10 | |
Tom Rini | 03de305 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 11 | #include <config.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 12 | #include <dm.h> |
Simon Glass | f3998fd | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 13 | #include <env_internal.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 14 | #include <errno.h> |
| 15 | #include <i2c.h> |
Moses Christopher | f233069 | 2020-03-25 06:45:45 +0000 | [diff] [blame] | 16 | #include <led.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 17 | #include <panel.h> |
Gireesh Hiremath | d364926 | 2021-06-11 16:13:43 +0000 | [diff] [blame] | 18 | #include <linux/delay.h> |
Simon Glass | 401d1c4 | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 19 | #include <asm/global_data.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 20 | #include <power/tps65217.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 21 | #include <spl.h> |
| 22 | #include <watchdog.h> |
| 23 | #include <asm/arch/clock.h> |
| 24 | #include <asm/arch/cpu.h> |
| 25 | #include <asm/arch/ddr_defs.h> |
| 26 | #include <asm/arch/gpio.h> |
| 27 | #include <asm/arch/hardware.h> |
Moses Christopher | 050531d | 2021-06-11 16:13:34 +0000 | [diff] [blame] | 28 | #include <asm/arch/mem-guardian.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 29 | #include <asm/arch/omap.h> |
| 30 | #include <asm/arch/sys_proto.h> |
| 31 | #include <asm/emif.h> |
| 32 | #include <asm/gpio.h> |
| 33 | #include <asm/io.h> |
Gireesh Hiremath | 9cd380e | 2021-06-11 16:13:47 +0000 | [diff] [blame] | 34 | #include <jffs2/load_kernel.h> |
| 35 | #include <mtd.h> |
| 36 | #include <nand.h> |
| 37 | #include <video.h> |
| 38 | #include <video_console.h> |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 39 | #include "board.h" |
| 40 | |
| 41 | DECLARE_GLOBAL_DATA_PTR; |
| 42 | |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 43 | #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 44 | static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; |
| 45 | |
| 46 | static const struct ddr_data ddr3_data = { |
| 47 | .datardsratio0 = MT41K128M16JT125K_RD_DQS, |
| 48 | .datawdsratio0 = MT41K128M16JT125K_WR_DQS, |
| 49 | .datafwsratio0 = MT41K128M16JT125K_PHY_FIFO_WE, |
| 50 | .datawrsratio0 = MT41K128M16JT125K_PHY_WR_DATA, |
| 51 | }; |
| 52 | |
| 53 | static const struct cmd_control ddr3_cmd_ctrl_data = { |
| 54 | .cmd0csratio = MT41K128M16JT125K_RATIO, |
| 55 | .cmd0iclkout = MT41K128M16JT125K_INVERT_CLKOUT, |
| 56 | |
| 57 | .cmd1csratio = MT41K128M16JT125K_RATIO, |
| 58 | .cmd1iclkout = MT41K128M16JT125K_INVERT_CLKOUT, |
| 59 | |
| 60 | .cmd2csratio = MT41K128M16JT125K_RATIO, |
| 61 | .cmd2iclkout = MT41K128M16JT125K_INVERT_CLKOUT, |
| 62 | }; |
| 63 | |
| 64 | static struct emif_regs ddr3_emif_reg_data = { |
| 65 | .sdram_config = MT41K128M16JT125K_EMIF_SDCFG, |
| 66 | .ref_ctrl = MT41K128M16JT125K_EMIF_SDREF, |
| 67 | .sdram_tim1 = MT41K128M16JT125K_EMIF_TIM1, |
| 68 | .sdram_tim2 = MT41K128M16JT125K_EMIF_TIM2, |
| 69 | .sdram_tim3 = MT41K128M16JT125K_EMIF_TIM3, |
| 70 | .zq_config = MT41K128M16JT125K_ZQ_CFG, |
| 71 | .emif_ddr_phy_ctlr_1 = MT41K128M16JT125K_EMIF_READ_LATENCY, |
| 72 | }; |
| 73 | |
| 74 | #define OSC (V_OSCK / 1000000) |
| 75 | const struct dpll_params dpll_ddr = { |
| 76 | 400, OSC - 1, 1, -1, -1, -1, -1}; |
| 77 | |
Paul Kocialkowski | b6dfc2c | 2024-07-29 22:44:38 +0200 | [diff] [blame] | 78 | void spl_board_init(void) |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 79 | { |
| 80 | int mpu_vdd; |
| 81 | int usb_cur_lim; |
| 82 | |
| 83 | /* Get the frequency */ |
| 84 | dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); |
| 85 | |
Gireesh Hiremath | 655a93f | 2022-05-04 11:02:58 +0000 | [diff] [blame] | 86 | /* Initialize for Power Management */ |
| 87 | if (power_tps65217_init(0)) |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 88 | return; |
| 89 | |
| 90 | /* |
| 91 | * Increase USB current limit to 1300mA or 1800mA and set |
| 92 | * the MPU voltage controller as needed. |
| 93 | */ |
| 94 | if (dpll_mpu_opp100.m == MPUPLL_M_1000) { |
| 95 | usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA; |
| 96 | mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV; |
| 97 | } else { |
| 98 | usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA; |
| 99 | mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV; |
| 100 | } |
| 101 | |
| 102 | if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, |
| 103 | TPS65217_POWER_PATH, |
| 104 | usb_cur_lim, |
| 105 | TPS65217_USB_INPUT_CUR_LIMIT_MASK)) |
| 106 | puts("tps65217_reg_write failure\n"); |
| 107 | |
| 108 | /* Set DCDC3 (CORE) voltage to 1.125V */ |
| 109 | if (tps65217_voltage_update(TPS65217_DEFDCDC3, |
| 110 | TPS65217_DCDC_VOLT_SEL_1125MV)) { |
| 111 | puts("tps65217_voltage_update failure\n"); |
| 112 | return; |
| 113 | } |
| 114 | |
| 115 | /* Set CORE Frequencies to OPP100 */ |
| 116 | do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); |
| 117 | |
| 118 | /* Set DCDC2 (MPU) voltage */ |
| 119 | if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) { |
| 120 | puts("tps65217_voltage_update failure\n"); |
| 121 | return; |
| 122 | } |
| 123 | |
| 124 | /* |
| 125 | * Set LDO3 to 1.8V and LDO4 to 3.3V |
| 126 | */ |
| 127 | if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, |
| 128 | TPS65217_DEFLS1, |
| 129 | TPS65217_LDO_VOLTAGE_OUT_1_8, |
| 130 | TPS65217_LDO_MASK)) |
| 131 | puts("tps65217_reg_write failure\n"); |
| 132 | |
| 133 | if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, |
| 134 | TPS65217_DEFLS2, |
| 135 | TPS65217_LDO_VOLTAGE_OUT_3_3, |
| 136 | TPS65217_LDO_MASK)) |
| 137 | puts("tps65217_reg_write failure\n"); |
| 138 | |
| 139 | /* Set MPU Frequency to what we detected now that voltages are set */ |
| 140 | do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); |
| 141 | } |
| 142 | |
| 143 | const struct dpll_params *get_dpll_ddr_params(void) |
| 144 | { |
| 145 | enable_i2c0_pin_mux(); |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 146 | |
| 147 | return &dpll_ddr; |
| 148 | } |
| 149 | |
| 150 | void set_uart_mux_conf(void) |
| 151 | { |
| 152 | enable_uart0_pin_mux(); |
| 153 | } |
| 154 | |
| 155 | void set_mux_conf_regs(void) |
| 156 | { |
| 157 | enable_board_pin_mux(); |
| 158 | } |
| 159 | |
| 160 | const struct ctrl_ioregs ioregs = { |
| 161 | .cm0ioctl = MT41K128M16JT125K_IOCTRL_VALUE, |
| 162 | .cm1ioctl = MT41K128M16JT125K_IOCTRL_VALUE, |
| 163 | .cm2ioctl = MT41K128M16JT125K_IOCTRL_VALUE, |
| 164 | .dt0ioctl = MT41K128M16JT125K_IOCTRL_VALUE, |
| 165 | .dt1ioctl = MT41K128M16JT125K_IOCTRL_VALUE, |
| 166 | }; |
| 167 | |
| 168 | void sdram_init(void) |
| 169 | { |
| 170 | config_ddr(400, &ioregs, |
| 171 | &ddr3_data, |
| 172 | &ddr3_cmd_ctrl_data, |
| 173 | &ddr3_emif_reg_data, 0); |
| 174 | } |
| 175 | #endif |
| 176 | |
| 177 | int board_init(void) |
| 178 | { |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 179 | save_omap_boot_params(); |
| 180 | |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 181 | #if defined(CONFIG_HW_WATCHDOG) |
| 182 | hw_watchdog_init(); |
| 183 | #endif |
| 184 | |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 185 | gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 186 | |
Miquel Raynal | 88718be | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 187 | #ifdef CONFIG_MTD_RAW_NAND |
Sjoerd Simons | 4512380 | 2019-02-25 15:33:00 +0000 | [diff] [blame] | 188 | gpmc_init(); |
| 189 | #endif |
| 190 | return 0; |
| 191 | } |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 192 | |
| 193 | #ifdef CONFIG_BOARD_LATE_INIT |
| 194 | static void set_bootmode_env(void) |
| 195 | { |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 196 | char *boot_mode_gpio = "gpio@44e07000_14"; |
| 197 | int ret; |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 198 | |
| 199 | struct gpio_desc boot_mode_desc; |
| 200 | |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 201 | ret = dm_gpio_lookup_name(boot_mode_gpio, &boot_mode_desc); |
| 202 | if (ret) { |
| 203 | printf("%s is not found\n", boot_mode_gpio); |
| 204 | goto err; |
| 205 | } |
| 206 | |
| 207 | ret = dm_gpio_request(&boot_mode_desc, "setup_bootmode_env"); |
| 208 | if (ret && ret != -EBUSY) { |
| 209 | printf("requesting gpio: %s failed\n", boot_mode_gpio); |
| 210 | goto err; |
| 211 | } |
| 212 | |
Gireesh Hiremath | d364926 | 2021-06-11 16:13:43 +0000 | [diff] [blame] | 213 | dm_gpio_set_dir_flags(&boot_mode_desc, GPIOD_IS_IN); |
| 214 | udelay(10); |
| 215 | |
| 216 | ret = dm_gpio_get_value(&boot_mode_desc); |
| 217 | if (ret == 0) { |
| 218 | env_set("swi_status", "1"); |
| 219 | } else if (ret == 1) { |
| 220 | env_set("swi_status", "0"); |
| 221 | } else { |
| 222 | printf("swi status gpio error\n"); |
| 223 | goto err; |
| 224 | } |
| 225 | |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 226 | return; |
| 227 | |
| 228 | err: |
| 229 | env_set("swi_status", "err"); |
| 230 | } |
| 231 | |
Gireesh Hiremath | ae628fb | 2021-06-11 16:13:44 +0000 | [diff] [blame] | 232 | void lcdbacklight_en(void) |
| 233 | { |
| 234 | unsigned long brightness = env_get_ulong("backlight_brightness", 10, 50); |
| 235 | |
| 236 | if (brightness > 99 || brightness == 0) |
| 237 | brightness = 99; |
| 238 | |
| 239 | /* |
| 240 | * Brightness range: |
| 241 | * WLEDCTRL2 DUTY[6:0] |
| 242 | * |
| 243 | * 000 0000b = 1% |
| 244 | * 000 0001b = 2% |
| 245 | * ... |
| 246 | * 110 0010b = 99% |
| 247 | * 110 0011b = 100% |
| 248 | * |
| 249 | */ |
| 250 | |
| 251 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL2, |
| 252 | brightness, 0xFF); |
| 253 | tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL1, |
| 254 | brightness != 0 ? 0x0A : 0x02, 0xFF); |
| 255 | } |
| 256 | |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 257 | int board_late_init(void) |
| 258 | { |
Gireesh Hiremath | 9cd380e | 2021-06-11 16:13:47 +0000 | [diff] [blame] | 259 | int ret; |
| 260 | struct udevice *cdev; |
| 261 | |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 262 | set_bootmode_env(); |
Gireesh Hiremath | 9cd380e | 2021-06-11 16:13:47 +0000 | [diff] [blame] | 263 | |
| 264 | ret = uclass_get_device(UCLASS_PANEL, 0, &cdev); |
| 265 | if (ret) { |
| 266 | debug("video panel not found: %d\n", ret); |
| 267 | return ret; |
| 268 | } |
| 269 | |
Gireesh Hiremath | 655a93f | 2022-05-04 11:02:58 +0000 | [diff] [blame] | 270 | /* Initialize to enable backlight */ |
| 271 | if (power_tps65217_init(0)) |
| 272 | return 0; |
| 273 | |
Gireesh Hiremath | ae628fb | 2021-06-11 16:13:44 +0000 | [diff] [blame] | 274 | lcdbacklight_en(); |
Gireesh Hiremath | 9cd380e | 2021-06-11 16:13:47 +0000 | [diff] [blame] | 275 | |
Moses Christopher | b1476b5 | 2019-09-17 14:25:37 +0000 | [diff] [blame] | 276 | return 0; |
| 277 | } |
| 278 | #endif /* CONFIG_BOARD_LATE_INIT */ |