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Sergey Lapin10794322008-10-31 12:28:43 +01001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/arch/at91sam9260.h>
28#include <asm/arch/at91sam9260_matrix.h>
29#include <asm/arch/at91sam9_smc.h>
Jean-Christophe PLAGNIOL-VILLARD1332a2a2009-03-21 21:07:59 +010030#include <asm/arch/at91_common.h>
Sergey Lapin10794322008-10-31 12:28:43 +010031#include <asm/arch/at91_pmc.h>
32#include <asm/arch/at91_rstc.h>
33#include <asm/arch/gpio.h>
34#include <asm/arch/io.h>
35#include <asm/arch/hardware.h>
36#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
37#include <netdev.h>
38#include <net.h>
39#endif
40
41DECLARE_GLOBAL_DATA_PTR;
42
43/* ------------------------------------------------------------------------- */
44/*
45 * Miscelaneous platform dependent initialisations
46 */
47
Sergey Lapin10794322008-10-31 12:28:43 +010048static void afeb9260_nand_hw_init(void)
49{
50 unsigned long csa;
51
52 /* Enable CS3 */
53 csa = at91_sys_read(AT91_MATRIX_EBICSA);
54 at91_sys_write(AT91_MATRIX_EBICSA,
55 csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
56
57 /* Configure SMC CS3 for NAND/SmartMedia */
58 at91_sys_write(AT91_SMC_SETUP(3),
59 AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
60 AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
61 at91_sys_write(AT91_SMC_PULSE(3),
62 AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
63 AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
64 at91_sys_write(AT91_SMC_CYCLE(3),
65 AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
66 at91_sys_write(AT91_SMC_MODE(3),
67 AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
68 AT91_SMC_EXNWMODE_DISABLE |
69 AT91_SMC_DBW_8 |
70 AT91_SMC_TDF_(2));
71
72 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
73
74 /* Configure RDY/BSY */
75 at91_set_gpio_input(AT91_PIN_PC13, 1);
76
77 /* Enable NandFlash */
78 at91_set_gpio_output(AT91_PIN_PC14, 1);
79}
80
81static void afeb9260_spi_hw_init(void)
82{
83 at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
84 at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
85
86 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
87 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
88 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
89
90 /* Enable clock */
91 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
92}
93
94#ifdef CONFIG_MACB
95static void afeb9260_macb_hw_init(void)
96{
97 /* Enable clock */
98 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
99
100 /*
101 * Disable pull-up on:
102 * RXDV (PA17) => PHY normal mode (not Test mode)
103 * ERX0 (PA14) => PHY ADDR0
104 * ERX1 (PA15) => PHY ADDR1
105 * ERX2 (PA25) => PHY ADDR2
106 * ERX3 (PA26) => PHY ADDR3
107 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
108 *
109 * PHY has internal pull-down
110 */
111 writel(pin_to_mask(AT91_PIN_PA14) |
112 pin_to_mask(AT91_PIN_PA15) |
113 pin_to_mask(AT91_PIN_PA17) |
114 pin_to_mask(AT91_PIN_PA25) |
115 pin_to_mask(AT91_PIN_PA26) |
116 pin_to_mask(AT91_PIN_PA28),
117 pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
118
119 /* Need to reset PHY -> 500ms reset */
120 at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
121 AT91_RSTC_ERSTL | (0x0D << 8) |
122 AT91_RSTC_URSTEN);
123
124 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
125
126 /* Wait for end hardware reset */
127 while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
128
129 /* Restore NRST value */
130 at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
131 AT91_RSTC_ERSTL | (0x0 << 8) |
132 AT91_RSTC_URSTEN);
133
134 /* Re-enable pull-up */
135 writel(pin_to_mask(AT91_PIN_PA14) |
136 pin_to_mask(AT91_PIN_PA15) |
137 pin_to_mask(AT91_PIN_PA17) |
138 pin_to_mask(AT91_PIN_PA25) |
139 pin_to_mask(AT91_PIN_PA26) |
140 pin_to_mask(AT91_PIN_PA28),
141 pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
142
143 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
144 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
145 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
146 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
147 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
148 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
149 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
150 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
151 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
152 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
153
154#ifndef CONFIG_RMII
155 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
156 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
157 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
158 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
159 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
160 at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
161 at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
162 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
163#endif
164
165}
166#endif
167
168int board_init(void)
169{
170 /* Enable Ctrlc */
171 console_init_f();
172
173 /* arch number of AT91SAM9260EK-Board */
174 gd->bd->bi_arch_number = MACH_TYPE_AFEB9260;
175 /* adress of boot parameters */
176 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
177
Jean-Christophe PLAGNIOL-VILLARD1332a2a2009-03-21 21:07:59 +0100178 at91_serial_hw_init();
Sergey Lapin10794322008-10-31 12:28:43 +0100179#ifdef CONFIG_CMD_NAND
180 afeb9260_nand_hw_init();
181#endif
182 afeb9260_spi_hw_init();
183#ifdef CONFIG_MACB
184 afeb9260_macb_hw_init();
185#endif
186
187 return 0;
188}
189
190int dram_init(void)
191{
192 gd->bd->bi_dram[0].start = PHYS_SDRAM;
193 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
194 return 0;
195}
196
197#ifdef CONFIG_RESET_PHY_R
198void reset_phy(void)
199{
200#ifdef CONFIG_MACB
201 /*
202 * Initialize ethernet HW addr prior to starting Linux,
203 * needed for nfsroot
204 */
205 eth_init(gd->bd);
206#endif
207}
208#endif
209
210int board_eth_init(bd_t *bis)
211{
212 int rc = 0;
213#ifdef CONFIG_MACB
Stelian Popd8003fa2008-11-07 13:54:31 +0100214 rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
Sergey Lapin10794322008-10-31 12:28:43 +0100215#endif
216 return rc;
217}