Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
Detlev Zundel | 792a09e | 2009-05-13 10:54:10 +0200 | [diff] [blame] | 5 | * Gary Jennejohn <garyj@denx.de> |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 6 | * David Mueller <d.mueller@elsoft.ch> |
| 7 | * |
| 8 | * (C) Copyright 2008 |
| 9 | * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> |
| 10 | * |
| 11 | * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board. |
| 12 | * |
| 13 | * See file CREDITS for list of people who contributed to this |
| 14 | * project. |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or |
| 17 | * modify it under the terms of the GNU General Public License as |
| 18 | * published by the Free Software Foundation; either version 2 of |
| 19 | * the License, or (at your option) any later version. |
| 20 | * |
| 21 | * This program is distributed in the hope that it will be useful, |
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 24 | * GNU General Public License for more details. |
| 25 | * |
| 26 | * You should have received a copy of the GNU General Public License |
| 27 | * along with this program; if not, write to the Free Software |
| 28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 29 | * MA 02111-1307 USA |
| 30 | */ |
| 31 | |
| 32 | #ifndef __CONFIG_H |
| 33 | #define __CONFIG_H |
| 34 | |
| 35 | /* |
| 36 | * High Level Configuration Options |
| 37 | * (easy to change) |
| 38 | */ |
| 39 | #define CONFIG_S3C6400 1 /* in a SAMSUNG S3C6400 SoC */ |
| 40 | #define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */ |
| 41 | #define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */ |
| 42 | |
Cyril Chemparathy | 678e008 | 2010-06-07 14:13:27 -0400 | [diff] [blame] | 43 | #define CONFIG_PERIPORT_REMAP |
| 44 | #define CONFIG_PERIPORT_BASE 0x70000000 |
| 45 | #define CONFIG_PERIPORT_SIZE 0x13 |
| 46 | |
seedshope | 6d56073 | 2011-01-22 10:06:09 +0000 | [diff] [blame] | 47 | #define CONFIG_SYS_IRAM_BASE 0x0c000000 /* Internal SRAM base address */ |
| 48 | #define CONFIG_SYS_IRAM_SIZE 0x2000 /* 8 KB of internal SRAM memory */ |
| 49 | #define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE) |
| 50 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE) |
| 51 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 52 | #define CONFIG_SYS_SDRAM_BASE 0x50000000 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 53 | |
| 54 | /* input clock of PLL: SMDK6400 has 12MHz input clock */ |
| 55 | #define CONFIG_SYS_CLK_FREQ 12000000 |
| 56 | |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 57 | #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 58 | #define CONFIG_ENABLE_MMU |
| 59 | #endif |
| 60 | |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 61 | #define CONFIG_SETUP_MEMORY_TAGS |
| 62 | #define CONFIG_CMDLINE_TAG |
| 63 | #define CONFIG_INITRD_TAG |
| 64 | |
| 65 | /* |
| 66 | * Architecture magic and machine type |
| 67 | */ |
Igor Grinberg | 221a066 | 2011-07-03 23:00:20 +0000 | [diff] [blame] | 68 | #define CONFIG_MACH_TYPE 1270 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 69 | |
| 70 | #define CONFIG_DISPLAY_CPUINFO |
| 71 | #define CONFIG_DISPLAY_BOARDINFO |
| 72 | |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 73 | /* |
| 74 | * Size of malloc() pool |
| 75 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 77 | |
| 78 | /* |
| 79 | * Hardware drivers |
| 80 | */ |
Ben Warren | b1c0eaa | 2009-08-25 13:09:37 -0700 | [diff] [blame] | 81 | #define CONFIG_NET_MULTI |
| 82 | #define CONFIG_CS8900 /* we have a CS8900 on-board */ |
| 83 | #define CONFIG_CS8900_BASE 0x18800300 |
| 84 | #define CONFIG_CS8900_BUS16 /* follow the Linux driver */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 85 | |
| 86 | /* |
| 87 | * select serial console configuration |
| 88 | */ |
| 89 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */ |
| 90 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 92 | #ifdef CONFIG_SYS_HUSH_PARSER |
| 93 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 94 | #endif |
| 95 | |
| 96 | #define CONFIG_CMDLINE_EDITING |
| 97 | |
| 98 | /* allow to overwrite serial and ethaddr */ |
| 99 | #define CONFIG_ENV_OVERWRITE |
| 100 | |
| 101 | #define CONFIG_BAUDRATE 115200 |
| 102 | |
| 103 | /*********************************************************** |
| 104 | * Command definition |
| 105 | ***********************************************************/ |
| 106 | #include <config_cmd_default.h> |
| 107 | |
| 108 | #define CONFIG_CMD_CACHE |
| 109 | #define CONFIG_CMD_REGINFO |
| 110 | #define CONFIG_CMD_LOADS |
| 111 | #define CONFIG_CMD_LOADB |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 112 | #define CONFIG_CMD_SAVEENV |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 113 | #define CONFIG_CMD_NAND |
| 114 | #if defined(CONFIG_BOOT_ONENAND) |
| 115 | #define CONFIG_CMD_ONENAND |
| 116 | #endif |
| 117 | #define CONFIG_CMD_PING |
| 118 | #define CONFIG_CMD_ELF |
| 119 | #define CONFIG_CMD_FAT |
| 120 | #define CONFIG_CMD_EXT2 |
| 121 | |
| 122 | #define CONFIG_BOOTDELAY 3 |
| 123 | |
| 124 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
| 125 | |
| 126 | #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) |
| 127 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
| 128 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
| 129 | #endif |
| 130 | |
| 131 | /* |
| 132 | * Miscellaneous configurable options |
| 133 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 135 | #define CONFIG_SYS_PROMPT "SMDK6400 # " /* Monitor Command Prompt */ |
| 136 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 137 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
| 138 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 139 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 140 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */ |
| 142 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 143 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 144 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 145 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_HZ 1000 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 147 | |
| 148 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 150 | |
| 151 | /*----------------------------------------------------------------------- |
| 152 | * Stack sizes |
| 153 | * |
| 154 | * The stack sizes are set up in start.S using the settings below |
| 155 | */ |
| 156 | #define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ |
| 157 | |
| 158 | /********************************** |
| 159 | Support Clock Settings |
| 160 | ********************************** |
| 161 | Setting SYNC ASYNC |
| 162 | ---------------------------------- |
| 163 | 667_133_66 X O |
| 164 | 533_133_66 O O |
| 165 | 400_133_66 X O |
| 166 | 400_100_50 O O |
| 167 | **********************************/ |
| 168 | |
| 169 | /*#define CONFIG_CLK_667_133_66*/ |
| 170 | #define CONFIG_CLK_533_133_66 |
| 171 | /* |
| 172 | #define CONFIG_CLK_400_100_50 |
| 173 | #define CONFIG_CLK_400_133_66 |
| 174 | #define CONFIG_SYNC_MODE |
| 175 | */ |
| 176 | |
| 177 | /* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */ |
| 178 | #define CONFIG_NR_DRAM_BANKS 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 179 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 180 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */ |
| 181 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | #define CONFIG_SYS_FLASH_BASE 0x10000000 |
| 183 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 184 | |
| 185 | /*----------------------------------------------------------------------- |
| 186 | * FLASH and environment organization |
| 187 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 188 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 189 | /* AM29LV160B has 35 sectors, AM29LV800B - 19 */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | #define CONFIG_SYS_MAX_FLASH_SECT 40 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 191 | |
| 192 | #define CONFIG_AMD_LV800 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_FLASH_CFI 1 /* Use CFI parameters (needed?) */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 194 | /* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */ |
Jean-Christophe PLAGNIOL-VILLARD | f9f692e | 2008-08-31 00:39:48 +0200 | [diff] [blame] | 195 | #define CONFIG_FLASH_CFI_DRIVER 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 196 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 197 | #define CONFIG_FLASH_CFI_LEGACY |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 198 | #define CONFIG_SYS_FLASH_LEGACY_512Kx16 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 199 | |
| 200 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 201 | #define CONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 202 | #define CONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 203 | |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 204 | #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 205 | |
| 206 | /* |
| 207 | * SMDK6400 board specific data |
| 208 | */ |
| 209 | |
| 210 | #define CONFIG_IDENT_STRING " for SMDK6400" |
| 211 | |
| 212 | /* base address for uboot */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 213 | #define CONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS_SDRAM_BASE + 0x07e00000) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 214 | /* total memory available to uboot */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 215 | #define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 216 | |
Guennadi Liakhovetski | b74ab73 | 2009-05-18 16:07:22 +0200 | [diff] [blame] | 217 | /* Put environment copies after the end of U-Boot owned RAM */ |
| 218 | #define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) |
| 219 | |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 220 | #ifdef CONFIG_ENABLE_MMU |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 221 | #define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 222 | #define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \ |
| 223 | "bootm 0xc0018000" |
| 224 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 225 | #define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 226 | #define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \ |
| 227 | "bootm 0x50018000" |
| 228 | #endif |
| 229 | |
| 230 | /* NAND U-Boot load and start address */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 231 | #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 232 | |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 233 | #define CONFIG_ENV_OFFSET 0x0040000 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 234 | |
| 235 | /* NAND configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 236 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 237 | #define CONFIG_SYS_NAND_BASE 0x70200010 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 238 | #define CONFIG_SYS_S3C_NAND_HWECC |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 239 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 240 | #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ |
| 241 | #define CONFIG_SYS_NAND_WP 1 |
| 242 | #define CONFIG_SYS_NAND_YAFFS_WRITE 1 /* support yaffs write */ |
| 243 | #define CONFIG_SYS_NAND_BBT_2NDPAGE 1 /* bad-block markers in 1st and 2nd pages */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 244 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 245 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE /* NUB load-addr */ |
| 246 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* NUB start-addr */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 247 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 248 | #define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024) /* Offset to RAM U-Boot image */ |
| 249 | #define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024) /* Size of RAM U-Boot image */ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 250 | |
| 251 | /* NAND chip page size */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 252 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 253 | /* NAND chip block size */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 254 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 255 | /* NAND chip page per block count */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 256 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 257 | /* Location of the bad-block label */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 258 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 259 | /* Extra address cycle for > 128MiB */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 260 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 261 | |
| 262 | /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 263 | #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 264 | /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 265 | #define CONFIG_SYS_NAND_ECCBYTES 4 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 266 | /* Number of ECC-blocks per NAND page */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 267 | #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 268 | /* Size of a single OOB region */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 269 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 270 | /* Number of ECC bytes per page */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 271 | #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS) |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 272 | /* ECC byte positions */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 273 | #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \ |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 274 | 48, 49, 50, 51, 52, 53, 54, 55, \ |
| 275 | 56, 57, 58, 59, 60, 61, 62, 63} |
| 276 | |
| 277 | /* Boot configuration (define only one of next 3) */ |
| 278 | #define CONFIG_BOOT_NAND |
| 279 | /* None of these are currently implemented. Left from the original Samsung |
| 280 | * version for reference |
| 281 | #define CONFIG_BOOT_NOR |
| 282 | #define CONFIG_BOOT_MOVINAND |
| 283 | #define CONFIG_BOOT_ONENAND |
| 284 | */ |
| 285 | |
| 286 | #define CONFIG_NAND |
| 287 | #define CONFIG_NAND_S3C64XX |
| 288 | /* Unimplemented or unsupported. See comment above. |
| 289 | #define CONFIG_ONENAND |
| 290 | #define CONFIG_MOVINAND |
| 291 | */ |
| 292 | |
| 293 | /* Settings as above boot configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 51bfee1 | 2008-09-10 22:47:58 +0200 | [diff] [blame] | 294 | #define CONFIG_ENV_IS_IN_NAND |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 295 | #define CONFIG_BOOTARGS "console=ttySAC,115200" |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 296 | |
| 297 | #if !defined(CONFIG_ENABLE_MMU) |
| 298 | #define CONFIG_CMD_USB 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d27bca | 2009-03-29 23:01:42 +0200 | [diff] [blame] | 299 | #define CONFIG_USB_S3C64XX |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 300 | #define CONFIG_USB_OHCI_NEW 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 301 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000 |
| 302 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400" |
| 303 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 |
| 304 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
Guennadi Liakhovetski | 11edcfe | 2008-08-31 00:39:47 +0200 | [diff] [blame] | 305 | |
| 306 | #define CONFIG_USB_STORAGE 1 |
| 307 | #endif |
| 308 | #define CONFIG_DOS_PARTITION 1 |
| 309 | |
| 310 | #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU) |
| 311 | # error "usb_ohci.c is currently broken with MMU enabled." |
| 312 | #endif |
| 313 | |
| 314 | #endif /* __CONFIG_H */ |