Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, <michael@schwingen.org> |
| 4 | * |
| 5 | * based in great part on jedec_probe.c from linux kernel: |
| 6 | * (C) 2000 Red Hat. GPL'd. |
| 7 | * Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | /* The DEBUG define must be before common to enable debugging */ |
| 30 | /*#define DEBUG*/ |
| 31 | |
| 32 | #include <common.h> |
| 33 | #include <asm/processor.h> |
| 34 | #include <asm/io.h> |
| 35 | #include <asm/byteorder.h> |
| 36 | #include <environment.h> |
| 37 | |
| 38 | #define P_ID_AMD_STD CFI_CMDSET_AMD_LEGACY |
| 39 | |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 40 | /* AMD */ |
Stefan Roese | 0192d7d | 2008-07-08 12:57:14 +0200 | [diff] [blame] | 41 | #define AM29DL800BB 0x22CB |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 42 | #define AM29DL800BT 0x224A |
| 43 | |
| 44 | #define AM29F800BB 0x2258 |
| 45 | #define AM29F800BT 0x22D6 |
| 46 | #define AM29LV400BB 0x22BA |
| 47 | #define AM29LV400BT 0x22B9 |
| 48 | #define AM29LV800BB 0x225B |
| 49 | #define AM29LV800BT 0x22DA |
| 50 | #define AM29LV160DT 0x22C4 |
| 51 | #define AM29LV160DB 0x2249 |
| 52 | #define AM29F017D 0x003D |
| 53 | #define AM29F016D 0x00AD |
| 54 | #define AM29F080 0x00D5 |
| 55 | #define AM29F040 0x00A4 |
| 56 | #define AM29LV040B 0x004F |
| 57 | #define AM29F032B 0x0041 |
| 58 | #define AM29F002T 0x00B0 |
| 59 | |
| 60 | /* SST */ |
| 61 | #define SST39LF800 0x2781 |
| 62 | #define SST39LF160 0x2782 |
| 63 | #define SST39VF1601 0x234b |
| 64 | #define SST39LF512 0x00D4 |
| 65 | #define SST39LF010 0x00D5 |
| 66 | #define SST39LF020 0x00D6 |
| 67 | #define SST39LF040 0x00D7 |
| 68 | #define SST39SF010A 0x00B5 |
| 69 | #define SST39SF020A 0x00B6 |
| 70 | |
| 71 | |
| 72 | /* |
| 73 | * Unlock address sets for AMD command sets. |
| 74 | * Intel command sets use the MTD_UADDR_UNNECESSARY. |
| 75 | * Each identifier, except MTD_UADDR_UNNECESSARY, and |
| 76 | * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[]. |
| 77 | * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure |
| 78 | * initialization need not require initializing all of the |
| 79 | * unlock addresses for all bit widths. |
| 80 | */ |
| 81 | enum uaddr { |
| 82 | MTD_UADDR_NOT_SUPPORTED = 0, /* data width not supported */ |
| 83 | MTD_UADDR_0x0555_0x02AA, |
| 84 | MTD_UADDR_0x0555_0x0AAA, |
| 85 | MTD_UADDR_0x5555_0x2AAA, |
| 86 | MTD_UADDR_0x0AAA_0x0555, |
| 87 | MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */ |
| 88 | MTD_UADDR_UNNECESSARY, /* Does not require any address */ |
| 89 | }; |
| 90 | |
| 91 | |
| 92 | struct unlock_addr { |
| 93 | u32 addr1; |
| 94 | u32 addr2; |
| 95 | }; |
| 96 | |
| 97 | |
| 98 | /* |
| 99 | * I don't like the fact that the first entry in unlock_addrs[] |
| 100 | * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore, |
| 101 | * should not be used. The problem is that structures with |
| 102 | * initializers have extra fields initialized to 0. It is _very_ |
| 103 | * desireable to have the unlock address entries for unsupported |
| 104 | * data widths automatically initialized - that means that |
| 105 | * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here |
| 106 | * must go unused. |
| 107 | */ |
| 108 | static const struct unlock_addr unlock_addrs[] = { |
| 109 | [MTD_UADDR_NOT_SUPPORTED] = { |
| 110 | .addr1 = 0xffff, |
| 111 | .addr2 = 0xffff |
| 112 | }, |
| 113 | |
| 114 | [MTD_UADDR_0x0555_0x02AA] = { |
| 115 | .addr1 = 0x0555, |
| 116 | .addr2 = 0x02aa |
| 117 | }, |
| 118 | |
| 119 | [MTD_UADDR_0x0555_0x0AAA] = { |
| 120 | .addr1 = 0x0555, |
| 121 | .addr2 = 0x0aaa |
| 122 | }, |
| 123 | |
| 124 | [MTD_UADDR_0x5555_0x2AAA] = { |
| 125 | .addr1 = 0x5555, |
| 126 | .addr2 = 0x2aaa |
| 127 | }, |
| 128 | |
| 129 | [MTD_UADDR_0x0AAA_0x0555] = { |
| 130 | .addr1 = 0x0AAA, |
| 131 | .addr2 = 0x0555 |
| 132 | }, |
| 133 | |
| 134 | [MTD_UADDR_DONT_CARE] = { |
| 135 | .addr1 = 0x0000, /* Doesn't matter which address */ |
| 136 | .addr2 = 0x0000 /* is used - must be last entry */ |
| 137 | }, |
| 138 | |
| 139 | [MTD_UADDR_UNNECESSARY] = { |
| 140 | .addr1 = 0x0000, |
| 141 | .addr2 = 0x0000 |
| 142 | } |
| 143 | }; |
| 144 | |
| 145 | |
| 146 | struct amd_flash_info { |
| 147 | const __u16 mfr_id; |
| 148 | const __u16 dev_id; |
| 149 | const char *name; |
| 150 | const int DevSize; |
| 151 | const int NumEraseRegions; |
| 152 | const int CmdSet; |
| 153 | const __u8 uaddr[4]; /* unlock addrs for 8, 16, 32, 64 */ |
| 154 | const ulong regions[6]; |
| 155 | }; |
| 156 | |
| 157 | #define ERASEINFO(size,blocks) (size<<8)|(blocks-1) |
| 158 | |
| 159 | #define SIZE_64KiB 16 |
| 160 | #define SIZE_128KiB 17 |
| 161 | #define SIZE_256KiB 18 |
| 162 | #define SIZE_512KiB 19 |
| 163 | #define SIZE_1MiB 20 |
| 164 | #define SIZE_2MiB 21 |
| 165 | #define SIZE_4MiB 22 |
| 166 | #define SIZE_8MiB 23 |
| 167 | |
| 168 | static const struct amd_flash_info jedec_table[] = { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 169 | #ifdef CONFIG_SYS_FLASH_LEGACY_256Kx8 |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 170 | { |
Stefan Roese | 28745db | 2009-01-29 11:21:38 +0100 | [diff] [blame] | 171 | .mfr_id = (u16)SST_MANUFACT, |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 172 | .dev_id = SST39LF020, |
| 173 | .name = "SST 39LF020", |
Stefan Roese | 9692c27 | 2007-12-08 08:25:09 +0100 | [diff] [blame] | 174 | .uaddr = { |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 175 | [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ |
| 176 | }, |
| 177 | .DevSize = SIZE_256KiB, |
| 178 | .CmdSet = P_ID_AMD_STD, |
| 179 | .NumEraseRegions= 1, |
| 180 | .regions = { |
| 181 | ERASEINFO(0x01000,64), |
| 182 | } |
Stefan Roese | 9692c27 | 2007-12-08 08:25:09 +0100 | [diff] [blame] | 183 | }, |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 184 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | #ifdef CONFIG_SYS_FLASH_LEGACY_512Kx8 |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 186 | { |
Stefan Roese | 28745db | 2009-01-29 11:21:38 +0100 | [diff] [blame] | 187 | .mfr_id = (u16)AMD_MANUFACT, |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 188 | .dev_id = AM29LV040B, |
| 189 | .name = "AMD AM29LV040B", |
| 190 | .uaddr = { |
| 191 | [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ |
| 192 | }, |
| 193 | .DevSize = SIZE_512KiB, |
| 194 | .CmdSet = P_ID_AMD_STD, |
| 195 | .NumEraseRegions= 1, |
| 196 | .regions = { |
| 197 | ERASEINFO(0x10000,8), |
| 198 | } |
| 199 | }, |
| 200 | { |
Stefan Roese | 28745db | 2009-01-29 11:21:38 +0100 | [diff] [blame] | 201 | .mfr_id = (u16)SST_MANUFACT, |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 202 | .dev_id = SST39LF040, |
| 203 | .name = "SST 39LF040", |
Stefan Roese | 9692c27 | 2007-12-08 08:25:09 +0100 | [diff] [blame] | 204 | .uaddr = { |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 205 | [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ |
| 206 | }, |
| 207 | .DevSize = SIZE_512KiB, |
| 208 | .CmdSet = P_ID_AMD_STD, |
| 209 | .NumEraseRegions= 1, |
| 210 | .regions = { |
| 211 | ERASEINFO(0x01000,128), |
| 212 | } |
Stefan Roese | 9692c27 | 2007-12-08 08:25:09 +0100 | [diff] [blame] | 213 | }, |
Niklaus Giger | 94f9279 | 2008-12-08 17:24:08 +0100 | [diff] [blame] | 214 | { |
Stefan Roese | 28745db | 2009-01-29 11:21:38 +0100 | [diff] [blame] | 215 | .mfr_id = (u16)STM_MANUFACT, |
Niklaus Giger | 94f9279 | 2008-12-08 17:24:08 +0100 | [diff] [blame] | 216 | .dev_id = STM_ID_M29W040B, |
| 217 | .name = "ST Micro M29W040B", |
| 218 | .uaddr = { |
| 219 | [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ |
| 220 | }, |
| 221 | .DevSize = SIZE_512KiB, |
| 222 | .CmdSet = P_ID_AMD_STD, |
| 223 | .NumEraseRegions= 1, |
| 224 | .regions = { |
| 225 | ERASEINFO(0x10000,8), |
| 226 | } |
| 227 | }, |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 228 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 229 | #ifdef CONFIG_SYS_FLASH_LEGACY_512Kx16 |
Tor Krill | 90447ec | 2008-03-28 11:29:10 +0100 | [diff] [blame] | 230 | { |
Stefan Roese | 28745db | 2009-01-29 11:21:38 +0100 | [diff] [blame] | 231 | .mfr_id = (u16)AMD_MANUFACT, |
Tor Krill | 90447ec | 2008-03-28 11:29:10 +0100 | [diff] [blame] | 232 | .dev_id = AM29LV400BB, |
| 233 | .name = "AMD AM29LV400BB", |
| 234 | .uaddr = { |
| 235 | [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ |
| 236 | }, |
| 237 | .DevSize = SIZE_512KiB, |
| 238 | .CmdSet = CFI_CMDSET_AMD_LEGACY, |
| 239 | .NumEraseRegions= 4, |
| 240 | .regions = { |
| 241 | ERASEINFO(0x04000,1), |
| 242 | ERASEINFO(0x02000,2), |
| 243 | ERASEINFO(0x08000,1), |
| 244 | ERASEINFO(0x10000,7), |
| 245 | } |
| 246 | }, |
Guennadi Liakhovetski | 7949839 | 2008-08-05 15:36:39 +0200 | [diff] [blame] | 247 | { |
Stefan Roese | 28745db | 2009-01-29 11:21:38 +0100 | [diff] [blame] | 248 | .mfr_id = (u16)AMD_MANUFACT, |
Guennadi Liakhovetski | 7949839 | 2008-08-05 15:36:39 +0200 | [diff] [blame] | 249 | .dev_id = AM29LV800BB, |
| 250 | .name = "AMD AM29LV800BB", |
| 251 | .uaddr = { |
| 252 | [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ |
| 253 | }, |
| 254 | .DevSize = SIZE_1MiB, |
| 255 | .CmdSet = CFI_CMDSET_AMD_LEGACY, |
| 256 | .NumEraseRegions= 4, |
| 257 | .regions = { |
| 258 | ERASEINFO(0x04000, 1), |
| 259 | ERASEINFO(0x02000, 2), |
| 260 | ERASEINFO(0x08000, 1), |
| 261 | ERASEINFO(0x10000, 15), |
| 262 | } |
| 263 | }, |
Tor Krill | 90447ec | 2008-03-28 11:29:10 +0100 | [diff] [blame] | 264 | #endif |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 265 | }; |
| 266 | |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 267 | static inline void fill_info(flash_info_t *info, const struct amd_flash_info *jedec_entry, ulong base) |
| 268 | { |
| 269 | int i,j; |
| 270 | int sect_cnt; |
| 271 | int size_ratio; |
| 272 | int total_size; |
| 273 | enum uaddr uaddr_idx; |
| 274 | |
| 275 | size_ratio = info->portwidth / info->chipwidth; |
| 276 | |
| 277 | debug("Found JEDEC Flash: %s\n", jedec_entry->name); |
| 278 | info->vendor = jedec_entry->CmdSet; |
| 279 | /* Todo: do we need device-specific timeouts? */ |
| 280 | info->erase_blk_tout = 30000; |
| 281 | info->buffer_write_tout = 1000; |
| 282 | info->write_tout = 100; |
| 283 | info->name = jedec_entry->name; |
| 284 | |
| 285 | /* copy unlock addresses from device table to CFI info struct. This |
| 286 | is just here because the addresses are in the table anyway - if |
| 287 | the flash is not detected due to wrong unlock addresses, |
| 288 | flash_detect_legacy would have to try all of them before we even |
| 289 | get here. */ |
| 290 | switch(info->chipwidth) { |
| 291 | case FLASH_CFI_8BIT: |
| 292 | uaddr_idx = jedec_entry->uaddr[0]; |
| 293 | break; |
| 294 | case FLASH_CFI_16BIT: |
| 295 | uaddr_idx = jedec_entry->uaddr[1]; |
| 296 | break; |
| 297 | case FLASH_CFI_32BIT: |
| 298 | uaddr_idx = jedec_entry->uaddr[2]; |
| 299 | break; |
| 300 | default: |
| 301 | uaddr_idx = MTD_UADDR_NOT_SUPPORTED; |
| 302 | break; |
| 303 | } |
| 304 | |
| 305 | debug("unlock address index %d\n", uaddr_idx); |
| 306 | info->addr_unlock1 = unlock_addrs[uaddr_idx].addr1; |
| 307 | info->addr_unlock2 = unlock_addrs[uaddr_idx].addr2; |
| 308 | debug("unlock addresses are 0x%x/0x%x\n", info->addr_unlock1, info->addr_unlock2); |
| 309 | |
| 310 | sect_cnt = 0; |
| 311 | total_size = 0; |
| 312 | for (i = 0; i < jedec_entry->NumEraseRegions; i++) { |
| 313 | ulong erase_region_size = jedec_entry->regions[i] >> 8; |
| 314 | ulong erase_region_count = (jedec_entry->regions[i] & 0xff) + 1; |
| 315 | |
| 316 | total_size += erase_region_size * erase_region_count; |
| 317 | debug ("erase_region_count = %d erase_region_size = %d\n", |
| 318 | erase_region_count, erase_region_size); |
| 319 | for (j = 0; j < erase_region_count; j++) { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 320 | if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { |
Michael Schwingen | 81b20cc | 2007-12-07 23:35:02 +0100 | [diff] [blame] | 321 | printf("ERROR: too many flash sectors\n"); |
| 322 | break; |
| 323 | } |
| 324 | info->start[sect_cnt] = base; |
| 325 | base += (erase_region_size * size_ratio); |
| 326 | sect_cnt++; |
| 327 | } |
| 328 | } |
| 329 | info->sector_count = sect_cnt; |
| 330 | info->size = total_size * size_ratio; |
| 331 | } |
| 332 | |
| 333 | /*----------------------------------------------------------------------- |
| 334 | * match jedec ids against table. If a match is found, fill flash_info entry |
| 335 | */ |
| 336 | int jedec_flash_match(flash_info_t *info, ulong base) |
| 337 | { |
| 338 | int ret = 0; |
| 339 | int i; |
| 340 | ulong mask = 0xFFFF; |
| 341 | if (info->chipwidth == 1) |
| 342 | mask = 0xFF; |
| 343 | |
| 344 | for (i = 0; i < ARRAY_SIZE(jedec_table); i++) { |
| 345 | if ((jedec_table[i].mfr_id & mask) == (info->manufacturer_id & mask) && |
| 346 | (jedec_table[i].dev_id & mask) == (info->device_id & mask)) { |
| 347 | fill_info(info, &jedec_table[i], base); |
| 348 | ret = 1; |
| 349 | break; |
| 350 | } |
| 351 | } |
| 352 | return ret; |
| 353 | } |