Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_TARGET_LS1021ATWR=y | ||||
Tom Rini | 278b90c | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x60100000 |
Tom Rini | 554e551 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 4 | CONFIG_NR_DRAM_BANKS=1 |
Tom Rini | a09fea1 | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 5 | CONFIG_ENV_SIZE=0x20000 |
Tom Rini | a09fea1 | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 6 | CONFIG_ENV_SECT_SIZE=0x20000 |
Tom Rini | 4244429 | 2020-02-06 13:42:52 -0500 | [diff] [blame] | 7 | CONFIG_DM_GPIO=y |
Tom Rini | f7d0ae9 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart" |
Peng Ma | b0d4a85 | 2019-01-30 19:19:40 +0800 | [diff] [blame] | 9 | CONFIG_AHCI=y |
Tom Rini | fa2c146 | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 10 | CONFIG_DISTRO_DEFAULTS=y |
Alison Wang | 397b0d9 | 2016-05-04 12:45:55 +0800 | [diff] [blame] | 11 | CONFIG_FIT=y |
12 | CONFIG_FIT_VERBOSE=y | ||||
Heiko Schocher | bb597c0 | 2016-06-07 08:31:14 +0200 | [diff] [blame] | 13 | CONFIG_OF_BOARD_SETUP=y |
14 | CONFIG_OF_STDOUT_VIA_ALIAS=y | ||||
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 15 | CONFIG_SYS_EXTRA_OPTIONS="LPUART" |
Heiko Schocher | bb597c0 | 2016-06-07 08:31:14 +0200 | [diff] [blame] | 16 | CONFIG_BOOTDELAY=3 |
Sam Protsenko | 5abc1a4 | 2017-08-14 20:22:17 +0300 | [diff] [blame] | 17 | CONFIG_USE_BOOTARGS=y |
18 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" | ||||
Tom Rini | fa2c146 | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 19 | # CONFIG_USE_BOOTCOMMAND is not set |
Simon Glass | 98af879 | 2016-10-17 20:12:35 -0600 | [diff] [blame] | 20 | CONFIG_SILENT_CONSOLE=y |
Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 21 | # CONFIG_CONSOLE_MUX is not set |
22 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y | ||||
Adam Ford | 8ccf98b | 2018-07-29 13:13:29 -0500 | [diff] [blame] | 23 | CONFIG_MISC_INIT_R=y |
Tuomas Tynkkynen | ad12dc1 | 2017-10-08 21:48:01 +0300 | [diff] [blame] | 24 | CONFIG_CMD_IMLS=y |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 25 | CONFIG_CMD_GREPENV=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 26 | CONFIG_CMD_MEMINFO=y |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 27 | CONFIG_CMD_MEMTEST=y |
Ashok Reddy Soma | 702de89 | 2020-05-04 15:26:21 +0200 | [diff] [blame] | 28 | CONFIG_SYS_MEMTEST_START=0x80000000 |
29 | CONFIG_SYS_MEMTEST_END=0x9fffffff | ||||
Patrick Delaunay | b331cd6 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 30 | CONFIG_CMD_GPT=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 31 | CONFIG_CMD_I2C=y |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 32 | CONFIG_CMD_MMC=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 33 | CONFIG_CMD_USB=y |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 34 | # CONFIG_CMD_SETEXPR is not set |
Simon Glass | 0f71025 | 2017-04-26 22:27:55 -0600 | [diff] [blame] | 35 | CONFIG_CMD_BMP=y |
Bin Meng | 665ac00 | 2016-01-13 19:39:06 -0800 | [diff] [blame] | 36 | CONFIG_OF_CONTROL=y |
Adam Ford | e91907a | 2020-07-03 06:48:56 -0500 | [diff] [blame] | 37 | CONFIG_ENV_OVERWRITE=y |
Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 38 | CONFIG_ENV_IS_IN_FLASH=y |
Tom Rini | a09fea1 | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 39 | CONFIG_ENV_ADDR=0x60300000 |
Bin Meng | 665ac00 | 2016-01-13 19:39:06 -0800 | [diff] [blame] | 40 | CONFIG_DM=y |
Peng Ma | b0d4a85 | 2019-01-30 19:19:40 +0800 | [diff] [blame] | 41 | CONFIG_SATA_CEVA=y |
Tom Rini | 2852267 | 2017-03-01 16:51:58 -0500 | [diff] [blame] | 42 | CONFIG_FSL_CAAM=y |
Tom Rini | 4244429 | 2020-02-06 13:42:52 -0500 | [diff] [blame] | 43 | CONFIG_DM_I2C=y |
Adam Ford | 2fe88d4 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 44 | CONFIG_DM_MMC=y |
Mario Six | 07dea2e | 2018-03-28 14:38:19 +0200 | [diff] [blame] | 45 | CONFIG_FSL_ESDHC=y |
Miquel Raynal | 888f184 | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 46 | CONFIG_MTD=y |
Masahiro Yamada | e856bdc | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 47 | CONFIG_MTD_NOR_FLASH=y |
Adam Ford | 2fe88d4 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 48 | CONFIG_FLASH_CFI_DRIVER=y |
49 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | ||||
50 | CONFIG_SYS_FLASH_CFI=y | ||||
Tom Rini | df33f86 | 2019-08-14 08:11:27 -0400 | [diff] [blame] | 51 | CONFIG_PHY_ATHEROS=y |
52 | CONFIG_DM_ETH=y | ||||
Tom Rini | 1989374 | 2017-08-07 22:00:34 -0400 | [diff] [blame] | 53 | CONFIG_PHY_GIGE=y |
Simon Glass | a77fda1 | 2015-08-19 09:33:43 -0600 | [diff] [blame] | 54 | CONFIG_E1000=y |
Adam Ford | d7869b21 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 55 | CONFIG_MII=y |
Mario Six | 1715105 | 2018-03-28 14:38:18 +0200 | [diff] [blame] | 56 | CONFIG_TSEC_ENET=y |
Patrick Delaunay | b331cd6 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 57 | CONFIG_PCI=y |
58 | CONFIG_DM_PCI=y | ||||
59 | CONFIG_DM_PCI_COMPAT=y | ||||
Hou Zhiqiang | ed188aa | 2020-07-09 23:31:42 +0800 | [diff] [blame] | 60 | CONFIG_PCIE_LAYERSCAPE_RC=y |
Peng Ma | b0d4a85 | 2019-01-30 19:19:40 +0800 | [diff] [blame] | 61 | CONFIG_DM_SCSI=y |
Tom Rini | aca5cd2 | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 62 | CONFIG_DM_SERIAL=y |
Bin Meng | 5ed07cf | 2016-01-13 19:39:00 -0800 | [diff] [blame] | 63 | CONFIG_FSL_LPUART=y |
Masahiro Yamada | 0a8cc1a | 2016-06-04 07:35:03 +0900 | [diff] [blame] | 64 | CONFIG_USB=y |
Alison Wang | 563ac65 | 2017-07-07 15:10:17 +0800 | [diff] [blame] | 65 | CONFIG_DM_USB=y |
Masahiro Yamada | 0a8cc1a | 2016-06-04 07:35:03 +0900 | [diff] [blame] | 66 | CONFIG_USB_XHCI_HCD=y |
Masahiro Yamada | 10db750 | 2016-06-04 07:35:04 +0900 | [diff] [blame] | 67 | CONFIG_USB_XHCI_DWC3=y |
Sanchayan Maity | b215fb3 | 2017-04-11 11:12:09 +0530 | [diff] [blame] | 68 | CONFIG_VIDEO_FSL_DCU_FB=y |
Tom Rini | 73dd818 | 2017-10-30 12:58:33 -0400 | [diff] [blame] | 69 | CONFIG_VIDEO=y |
Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 70 | # CONFIG_VIDEO_SW_CURSOR is not set |