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Marek Vasut3ebb9192019-07-29 19:59:44 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * include/configs/condor.h
4 * This file is Condor board configuration.
5 *
6 * Copyright (C) 2019 Renesas Electronics Corporation
7 */
8
9#ifndef __CONDOR_H
10#define __CONDOR_H
11
12#include "rcar-gen3-common.h"
13
14/* Ethernet RAVB */
Marek Vasut3ebb9192019-07-29 19:59:44 +020015#define CONFIG_BITBANGMII_MULTI
16
17/* Environment compatibility */
Marek Vasut3ebb9192019-07-29 19:59:44 +020018
19/* SH Ether */
20#define CONFIG_SH_ETHER_USE_PORT 0
21#define CONFIG_SH_ETHER_PHY_ADDR 0x1
22#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
23#define CONFIG_SH_ETHER_CACHE_WRITEBACK
24#define CONFIG_SH_ETHER_CACHE_INVALIDATE
25#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
Marek Vasut3ebb9192019-07-29 19:59:44 +020026#define CONFIG_BITBANGMII_MULTI
27
28/* Board Clock */
29/* XTAL_CLK : 33.33MHz */
Marek Vasut3ebb9192019-07-29 19:59:44 +020030
31/* Generic Timer Definitions (use in assembler source) */
32#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
33
34#endif /* __CONDOR_H */